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1. (CN101625897) 用于快闪存储器的数据写入方法、储存系统与控制器

专利局 : 中国
申请号: 200810136061.5 申请日: 11.07.2008
公布号: 101625897 公布日: 13.01.2010
授权号: 101625897 授权日: 30.05.2012
公布类型: B
国际专利分类:
G11C 16/08
G11C 7/10
G PHYSICS
11
信息存储
C
静态存储器
16
可擦除可编程序只读存储器
02
电可编程序的
06
辅助电路,例如,用于写入存储器的
08
地址电路;译码器;字线控制电路
G PHYSICS
11
信息存储
C
静态存储器
7
数字存储器信息的写入或读出装置
10
输入/输出数据接口装置,例如,I/O数据控制电路,I/O数据缓冲器
申请人: Phison Electronics Corp.
群联电子股份有限公司
发明人: Zhu Jianhua
朱健华
代理人: bo maiwen
北京市柳沈律师事务所 11105
优先权数据:
标题: (EN) Data write-in method, storage system and controller used for quick flash memory
(ZH) 用于快闪存储器的数据写入方法、储存系统与控制器
摘要: front page image
(EN) The invention relates to a method for writing-in data in a multi level cell (MLC) NAND quick flash memory and a storage system and a controller which use the method. The MLC NAND quick flash memory comprises a plurality of area blocks, wherein each area block comprises a plurality of page addresses, and the page addresses are divided into a plurality of upper page addresses and a plurality of lower page addresses with the write-in speed higher than that of the upper page addresses. The data write-in method comprises the following steps: receiving a write-in command and data to be written-in and writing-in the data to the page addresses, wherein the page addresses to be written-in are skipped when the page addresses to be written-in are the upper page addresses and the lower page addresses corresponding to the page addresses to be written-in already store effective data written-in by the previous write-in command. Therefore, the correctness of the data written-in by the previous write-in command is ensured when a programming error occurs in the MLC NAND quick flash memory.
(ZH)

一种在多层记忆胞(Multi Level Cell,MLC)NAND快闪存储器中写入数据的方法及使用此方法的储存系统与控制器,其中此MLC NAND快闪存储器包括多个区块,其中每一区块包括多个页面地址且这些页面地址区分为多个上页地址与写入速度快于上页地址的多个下页地址,此数据写入方法包括接收写入指令与欲写入的数据,以及写入数据至页面地址中,其中当欲写入的页面地址为上页地址且欲写入的页面地址所对应的下页地址已储存先前写入指令所写入的有效数据时则跳过此欲写入的页面地址。基此,能够在对MLCNAND快闪存储器发生编程错误时,确保先前写入指令所写入的数据的正确性。