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1. (WO2018103117) CHIP PACKAGING STRUCTURE, AND PACKAGING METHOD THEREOF

Pub. No.:    WO/2018/103117    International Application No.:    PCT/CN2016/109499
Publication Date: Fri Jun 15 01:59:59 CEST 2018 International Filing Date: Tue Dec 13 00:59:59 CET 2016
IPC: H01L 23/31
H01L 23/488
H01L 21/48
H01L 21/56
H01L 21/683
Applicants: JIANGYIN CHANGDIAN ADVANCED PACKAGING CO., LTD
江阴长电先进封装有限公司
Inventors: ZHANG, Li
张黎
XU, Hong
徐虹
CHEN, Dong
陈栋
CHEN, Jinhui
陈锦辉
LAI, Zhiming
赖志明
CHEN, Qicai
陈启才
Title: CHIP PACKAGING STRUCTURE, AND PACKAGING METHOD THEREOF
Abstract:
The present invention relates to the technical field of semiconductor packaging, and provides a chip packaging structure, and packaging method thereof. The structure comprises a silicon-based main body (1) and chip electrodes (11). The silicon-based main body (1) is provided with a passivation layer (12) and passivation layer openings (121) on a front face thereof. The chip electrodes (11) have rear faces embedded in the front face of the silicon-based main body (1). The passivation layer openings (121) expose front faces of the chip electrodes (11). A dielectric layer (4) is provided on an upper surface of the passivation layer (12), and dielectric layer openings (41) are provided. Metal protrusion structures (5) are provided on the front faces of the chip electrodes (11). An encapsulation layer (3) is provided on side walls and a rear face of the silicon-based main body (1). The chip packaging structure of the present invention employs insulation protection on side walls to avoid electrical leakage and short circuit conditions, thus increasing reliability and improving the pass rate of chip mounting. By providing recesses on a rear face of a wafer to divide the wafer into individual chip units, and employing a protection technique in the surrounding and rear surfaces of the individual chip units, the packaging method of the present invention eliminates wafer reconfiguration, and effectively improves production efficiency for small-sized chips, thus reducing costs.