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1. WO2020154954 - SOUDAGE HYBRIDE AU MOYEN DE CONTACTS DE SOUDAGE FACTICES ET D’INTERCONNEXIONS FACTICES

Numéro de publication WO/2020/154954
Date de publication 06.08.2020
N° de la demande internationale PCT/CN2019/073909
Date du dépôt international 30.01.2019
CIB
H01L 23/485 2006.1
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
23Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
48Dispositions pour conduire le courant électrique vers le ou hors du corps à l'état solide pendant son fonctionnement, p.ex. fils de connexion ou bornes
482formées de couches conductrices inséparables du corps semi-conducteur sur lequel elles ont été déposées
485formées de structures en couches comprenant des couches conductrices et isolantes, p.ex. contacts planaires
CPC
H01L 21/76841
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76841Barrier, adhesion or liner layers
H01L 2224/0231
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
023Redistribution layers [RDL] for bonding areas
0231Manufacturing methods of the redistribution layers
H01L 2224/02331
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
023Redistribution layers [RDL] for bonding areas
0233Structure of the redistribution layers
02331Multilayer structure
H01L 2224/0345
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
034by blanket deposition of the material of the bonding area
03444in gaseous form
0345Physical vapour deposition [PVD], e.g. evaporation, or sputtering
H01L 2224/03452
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
034by blanket deposition of the material of the bonding area
03444in gaseous form
03452Chemical vapour deposition [CVD], e.g. laser CVD
H01L 2224/03616
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
036by patterning a pre-deposited material
0361Physical or chemical etching
03616Chemical mechanical polishing [CMP]
Déposants
  • YANGTZE MEMORY TECHNOLOGIES CO., LTD. [CN]/[CN]
Inventeurs
  • WANG, Tao
  • HU, Si Ping
  • WANG, Jia Wen
  • HUANG, Shi Qi
  • ZHU, Jifeng
  • CHEN, Jun
  • HUA, Zi Qun
Mandataires
  • NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD.
Données relatives à la priorité
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) HYBRID BONDING USING DUMMY BONDING CONTACTS AND DUMMY INTERCONNECTS
(FR) SOUDAGE HYBRIDE AU MOYEN DE CONTACTS DE SOUDAGE FACTICES ET D’INTERCONNEXIONS FACTICES
Abrégé
(EN)
Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a semiconductor device includes a first and a second semiconductor structures. The first semiconductor structure includes a first interconnect layer including first interconnects. At least one first interconnect is a first dummy interconnect. The first semiconductor structure further includes a first bonding layer including first bonding contacts. Each first interconnect is in contact with a respective first bonding contact. The second semiconductor structure includes a second interconnect layer including second interconnects. At least one second interconnect is a second dummy interconnect. The second semiconductor structure further includes a second bonding layer including second bonding contacts. Each second interconnect is in contact with a respective second bonding contact. The semiconductor device further includes a bonding interface between the first and second bonding layers. Each first bonding contact is in contact with a respective second bonding contact at the bonding interface.
(FR)
L’invention concerne des modes de réalisation de structures semi-conductrices soudées et leurs procédés de fabrication. Selon un exemple, un dispositif semi-conducteur inclut une première et une deuxième structure semi-conductrice. La première structure semi-conductrice inclut une première couche d’interconnexions incluant des premières interconnexions. Au moins une première interconnexion est une première interconnexion factice. La première structure semi-conductrice inclut en outre une première couche de soudage incluant des premiers contacts de soudage. Chaque première interconnexion est en contact avec un premier contact de soudage respectif. La deuxième structure semi-conductrice inclut une deuxième couche d’interconnexions incluant des deuxièmes interconnexions. Au moins une deuxième interconnexion est une deuxième interconnexion factice. La deuxième structure semi-conductrice inclut en outre une deuxième couche de soudage incluant des deuxièmes contacts de soudage. Chaque deuxième interconnexion est en contact avec un deuxième contact de soudage respectif. Le dispositif semi-conducteur inclut en outre une interface de soudage entre les première et deuxième couches de soudage. Chaque premier contact de soudage est en contact avec un deuxième contact de soudage respectif à l’interface de soudage.
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