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1. WO2020109261 - CIRCUIT NEUROSTIMULATEUR ISOLÉ

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CLAIMS

At least the following is claimed:

1. A neurostimulator circuit (12), comprising:

a galvanically isolated first stimulator channel, comprising a current source unit (30), the current source unit comprising:

an H-bridge circuit (36) comprising a first pair of switch transistors (M1 , M2) configured to operate according to a first voltage and a cascode circuit comprising a second pair transistors (M3, M4); and

a current source circuit (34) configured to operate according to a second voltage and coupled to the cascode circuit; and

a pair of electrodes (38) having one of a positive or negative current driven across the pair of electrodes based on parameters received at each of the transistors of the H-bridge circuit, the current comprising a magnitude according to the current source circuit.

2. The neurostimulator circuit of the preceding claim, wherein the first voltage comprises a stimulation voltage, wherein the cascode circuit is configured to transform the stimulation voltage to a second voltage (+5Vi), the second voltage lower than the stimulation voltage, the second pair of transistors configured to be operate at the stimulation voltage.

3. The neurostimulator circuit of any one of the preceding claims, further comprising a galvanically isolated power source (26) and a galvanically isolated data interface, wherein the first stimulator channel is configured to receive isolated, low-voltage power and digital data, and optionally timing signals via the galvanically isolated power source and the galvanically isolated data interface.

4. The neurostimulator circuit of any one of the preceding claims, wherein the first stimulator channel is configured to provide conversion between different voltage levels according to either a DC/DC converter (28) that is configured to convert low voltage (+5Vi) received from the galvanically isolated power source to the first voltage suitable for stimulation or the first stimulator channel configured to receive from the galvanically isolated power source the first voltage and convert to the second voltage.

5. The neurostimulator circuit of any one of the preceding claims, wherein the DC/DC converter is configured to convert the low voltage power based on either a variable conversion ratio and a plurality of stimulation values or a conversion ratio that is dynamically adjusted based on a comparison of a measured value corresponding to a transistor (M5) of the current source circuit and a predetermined current source compliance value.

6. The neurostimulator circuit of any one of the preceding claims, wherein the current source unit further comprises an error amplifier (A2) and a sense resistor (R1 ), wherein the error amplifier adjusts a current through the transistor of the current source circuit according to a voltage at the error amplifier relative to a resistance at the sense resistor.

7. The neurostimulator circuit of any one of the preceding claims, wherein the cascode circuit limits a voltage at the transistor of the current source circuit to below a defined isolation voltage.

8. The neurostimulator circuit of any one of the preceding claims, further comprising shorting the pair of electrodes to either the first voltage or ground, wherein the shorting removes charge from the pair of electrodes or wherein shorting to the first voltage precharges parasitic capacitance between the isolated first stimulator channel and a subject.

9. The neurostimulator circuit of any one of the preceding claims, wherein the current source unit further comprises an isolation-side channel controller (22k) configured to provide parameters to the H-bridge circuit, the transistors of the H-bridge circuit controlled by the channel controller to close at most one of the transistors on each side of the H-bridge circuit at one time, wherein the channel controller controls operations of the first stimulator channel, the operations including generating the voltage corresponding to current input to the error amplifier and providing the parameters.

10. The neurostimulator circuit of any one of the preceding claims, wherein the channel controller is further configured to monitor one or more points of the current source unit and to enforce subject safety measures based on the monitoring, wherein enforcement includes configuring the first stimulator channel to a failsafe state.

1 1 . The neurostimulator circuit of any one of the preceding claims, wherein the failsafe state comprises one or more of disabling the DC/DC converter or turning off all transistors of the H-bridge circuit.

12. The neurostimulator circuit of any one of the preceding claims, further comprising a system controller (18) coupled to the channel controller via the

galvanically isolated digital interface and the galvanically isolated power source.

13. The neurostimulator circuit of any one of the preceding claims, wherein the system controller is configured to enforce subject safety measures by one or more of shutting down power to the first stimulator channel via the galvanically isolated power source or disconnecting the pair of electrodes.

14. The neurostimulator circuit of any one of the preceding claims, wherein the channel controller and system controller or auxiliary safety monitoring circuit (42) are configured to provide parallel supervision.

15. The neurostimulator circuit of any one of the preceding claims, further comprising one or more additional stimulator channels each configured according to the first stimulator channel and in communication with the system controller.