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1. WO2020019869 - SUBSTRAT DE RÉSEAU, SON PROCÉDÉ DE PRÉPARATION, ET DISPOSITIF D'AFFICHAGE

Numéro de publication WO/2020/019869
Date de publication 30.01.2020
N° de la demande internationale PCT/CN2019/089554
Date du dépôt international 31.05.2019
CIB
H01L 27/12 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
27Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun
02comprenant des composants semi-conducteurs spécialement adaptés pour le redressement, l'amplification, la génération d'oscillations ou la commutation et ayant au moins une barrière de potentiel ou une barrière de surface; comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
12le substrat étant autre qu'un corps semi-conducteur, p.ex. un corps isolant
CPC
H01L 21/77
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L 27/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
H01L 27/124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
124with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
H01L 27/1244
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
124with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
1244for preventing breakage, peeling or short circuiting
H01L 27/1259
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
H01L 27/1288
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
1288employing particular masking sequences or specially adapted masks, e.g. half-tone mask
Déposants
  • 京东方科技集团股份有限公司 BOE TECHNOLOGY GROUP CO., LTD. [CN]/[CN]
  • 福州京东方光电科技有限公司 FUZHOU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN]/[CN]
Inventeurs
  • 欧忠星 OU, Zhongxing
  • 杨姗姗 YANG, Shanshan
Mandataires
  • 中科专利商标代理有限责任公司 CHINA SCIENCE PATENT & TRADEMARK AGENT LTD.
Données relatives à la priorité
201810844542.527.07.2018CN
Langue de publication chinois (ZH)
Langue de dépôt chinois (ZH)
États désignés
Titre
(EN) ARRAY SUBSTRATE, PREPARATION METHOD THEREOF, AND DISPLAY DEVICE
(FR) SUBSTRAT DE RÉSEAU, SON PROCÉDÉ DE PRÉPARATION, ET DISPOSITIF D'AFFICHAGE
(ZH) 阵列基板及其制备方法、显示装置
Abrégé
(EN)
Embodiments of the present disclosure provide an array substrate, comprising a substrate, a plurality of gate line groups disposed on the substrate, and a plurality of pixel units arranged in the array, each of the plurality of gate line groups is disposed between two adjacent rows of pixel units, wherein each of the gate line groups includes a first gate line and a second gate line insulated from each other, the first gate line is connected to the control electrode of the first transistor, the second gate line is connected to the control electrode of the second transistor, and the control electrode of the first transistor and the control electrode of the second transistor are disposed in different layers. Embodiments of the present disclosure also provide a method of preparing the array substrate and a display device.
(FR)
Des modes de réalisation de la présente invention concernent un substrat de réseau, comprenant un substrat, une pluralité de groupes de lignes de grille disposés sur le substrat, et une pluralité d'unités de pixel agencées dans le réseau, chaque groupe de la pluralité de groupes de lignes de grille étant disposé entre deux rangées adjacentes d'unités de pixel, chacun des groupes de lignes de grille comprenant une première ligne de grille et une seconde ligne de grille isolées l'une de l'autre, la première ligne de grille étant connectée à l'électrode de commande du premier transistor, la seconde ligne de grille étant connectée à l'électrode de commande du second transistor, et l'électrode de commande du premier transistor et l'électrode de commande du second transistor étant disposées dans des couches différentes. Des modes de réalisation de la présente invention concernent aussi un procédé de préparation du substrat de réseau et un dispositif d'affichage.
(ZH)
本公开的实施例提供了一种阵列基板,包括衬底、设置在衬底上的多个栅线组,以及阵列排布的多个像素单元,所述多个栅线组中的每个栅线组布置在相邻的两行像素单元之间,其中每个所述栅线组包括相互绝缘的第一栅线和第二栅线,第一栅线与第一晶体管的控制极连接,第二栅线与第二晶体管的控制极连接,并且所述第一晶体管的控制极和所述第二晶体管的控制极设置在不同层中。。还提供了一种阵列基板的制备方法和一种显示装置。
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