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1. WO2016085572 - DISPOSITIF DE MÉMOIRE CONTENANT DES ÉLECTRODES DE GRILLE DE COMMANDE ACCORDABLES SOUS CONTRAINTE

Numéro de publication WO/2016/085572
Date de publication 02.06.2016
N° de la demande internationale PCT/US2015/053829
Date du dépôt international 02.10.2015
CIB
H01L 27/115 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
27Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun
02comprenant des composants semi-conducteurs spécialement adaptés pour le redressement, l'amplification, la génération d'oscillations ou la commutation et ayant au moins une barrière de potentiel ou une barrière de surface; comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
04le substrat étant un corps semi-conducteur
10comprenant une pluralité de composants individuels dans une configuration répétitive
105comprenant des composants à effet de champ
112Structures de mémoires mortes
115Mémoires mortes programmables électriquement; Procédés de fabrication à étapes multiples de ces dispositifs
CPC
H01L 27/0207
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
0203Particular design considerations for integrated circuits
0207Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
H01L 27/11524
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11517with floating gate
11521characterised by the memory core region
11524with cell select transistors, e.g. NAND
H01L 27/11551
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11517with floating gate
11551characterised by three-dimensional arrangements, e.g. with cells on different height levels
H01L 27/11556
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11517with floating gate
11551characterised by three-dimensional arrangements, e.g. with cells on different height levels
11553with source and drain on different levels, e.g. with sloping channels
11556the channels comprising vertical portions, e.g. U-shaped channels
H01L 27/1157
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11563with charge-trapping gate insulators, e.g. MNOS or NROM
11568characterised by the memory core region
1157with cell select transistors, e.g. NAND
H01L 27/11578
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
112Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115Electrically programmable read-only memories; Multistep manufacturing processes therefor
11563with charge-trapping gate insulators, e.g. MNOS or NROM
11578characterised by three-dimensional arrangements, e.g. with cells on different height levels
Déposants
  • SANDISK TECHNOLOGIES, LLC [US]/[US]
Inventeurs
  • SHARANGPANI, Rahul
  • MAKALA, Raghuveer S.
  • MATAMIS, George
Mandataires
  • RADOMSKY, Leon
Données relatives à la priorité
14/553,14925.11.2014US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) MEMORY DEVICE CONTAINING STRESS-TUNABLE CONTROL GATE ELECTRODES
(FR) DISPOSITIF DE MÉMOIRE CONTENANT DES ÉLECTRODES DE GRILLE DE COMMANDE ACCORDABLES SOUS CONTRAINTE
Abrégé
(EN)
A memory film and a semiconductor channel are formed within each memory opening that extends through a stack including an alternating plurality of insulator layers and sacrificial material layers. After formation of backside recesses through removal of the sacrificial material layers selective to the insulator layers, electrically conductive layers are formed in the backside recesses. Each electrically conductive layer includes a combination of a tensile- stress-generating metallic material and a compressive-stress-generating metallic material. The tensile-stress-generating metallic material may be ruthenium and the compressive-stress- generating metallic material may be tungsten. An anneal may be performed to provide an alloy of the compressive-stress-generating metallic material and the tensile-stress-generating metallic material.
(FR)
L'invention concerne un film de mémoire et un canal à semi-conducteur formés à l'intérieur de chaque ouverture de mémoire qui s'étend à travers un empilement comprenant une pluralité alternée de couches isolantes et de couches de matériau sacrificiel. Après la formation d'évidements de côté arrière au moyen du retrait des couches de matériau sacrificiel de façon sélective pour les couches isolantes, des couches électroconductrices sont formées dans les évidements de côté arrière. Chaque couche électroconductrice comprend une combinaison d'un matériau métallique de génération de contrainte de traction et d'un matériau métallique de génération de contrainte de compression. Le matériau métallique de génération de contrainte de traction peut être du ruthénium et le matériau métallique de génération de contrainte de compression peut être du tungstène. Un recuit peut être effectué pour produire un alliage du matériau métallique de génération de contrainte de traction et du matériau métallique de génération de contrainte de compression.
Également publié en tant que
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