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Paramétrages

1. WO2012004876 - CORPS LIÉ, DISPOSITIF SEMI-CONDUCTEUR MUNI DUDIT CORPS LIÉ, PROCÉDÉ DE LIAISON ET PROCÉDÉ DE PRODUCTION UTILISANT LEDIT PROCÉDÉ DE LIAISON

Numéro de publication WO/2012/004876
Date de publication 12.01.2012
N° de la demande internationale PCT/JP2010/061611
Date du dépôt international 08.07.2010
CIB
H01L 21/52 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
02Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
04les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
50Assemblage de dispositifs à semi-conducteurs en utilisant des procédés ou des appareils non couverts par l'un uniquement des groupes H01L21/06-H01L21/326185
52Montage des corps semi-conducteurs dans les conteneurs
CPC
H01L 2224/04042
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
04042Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
H01L 2224/05624
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05599Material
056with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
05617the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
05624Aluminium [Al] as principal constituent
H01L 2224/32245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32245the item being metallic
H01L 2224/45015
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
44Structure, shape, material or disposition of the wire connectors prior to the connecting process
45of an individual wire connector
45001Core members of the connector
4501Shape
45012Cross-sectional shape
45015being circular
H01L 2224/45124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
44Structure, shape, material or disposition of the wire connectors prior to the connecting process
45of an individual wire connector
45001Core members of the connector
45099Material
451with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
45117the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
45124Aluminium (Al) as principal constituent
H01L 2224/4847
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
484Connecting portions
4847the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
Déposants
  • 三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP/JP]; 東京都千代田区丸の内二丁目7番3号 7-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008310, JP (AllExceptUS)
  • 前田 晃 MAEDA, Akira; JP (UsOnly)
  • 山田 朗 YAMADA, Akira; JP (UsOnly)
  • 林 建一 HAYASHI, Kenichi; JP (UsOnly)
Inventeurs
  • 前田 晃 MAEDA, Akira; JP
  • 山田 朗 YAMADA, Akira; JP
  • 林 建一 HAYASHI, Kenichi; JP
Mandataires
  • 特許業務法人深見特許事務所 Fukami Patent Office, p.c.; 大阪府大阪市北区中之島二丁目2番7号 中之島セントラルタワー Nakanoshima Central Tower, 2-7, Nakanoshima 2-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
Données relatives à la priorité
Langue de publication japonais (JA)
Langue de dépôt japonais (JA)
États désignés
Titre
(EN) BONDED BODY, SEMICONDUCTOR DEVICE PROVIDED WITH SAME, BONDING METHOD, AND PRODUCTION METHOD USING SAME
(FR) CORPS LIÉ, DISPOSITIF SEMI-CONDUCTEUR MUNI DUDIT CORPS LIÉ, PROCÉDÉ DE LIAISON ET PROCÉDÉ DE PRODUCTION UTILISANT LEDIT PROCÉDÉ DE LIAISON
(JA) 接合体およびそれを備えた半導体装置、ならびに、接合方法およびそれを用いた製造方法
Abrégé
(EN)
Disclosed is a bonded body that is a semiconductor element (1) and a substrate (2) bonded with a metal porous body (3) therebetween. The bonded body is characterized by one surface of said metal porous body (3) being bonded to the aforementioned semiconductor element (1) with a bonding material therebetween and the other surface of said metal porous body (3) being bonded to the aforementioned substrate (2) with a bonding material therebetween while in the state of the aforementioned metal porous body (3) being sandwiched between the aforementioned semiconductor element (1) and the aforementioned substrate (2), and is further characterized by the mechanical strength at the central section in the in-plane direction of the aforementioned metal porous body (3) being higher than at the peripheral section. Further disclosed is a semiconductor device provided with same.
(FR)
L'invention concerne un corps lié qui est constitué d'un élément semi-conducteur (1) et d'un substrat (2) liés à un corps poreux métallique (3) se trouvant entre ces derniers. Le corps lié est caractérisé en ce qu'une surface dudit corps poreux métallique (3) est liée à l'élément semi-conducteur (1) mentionné ci-dessus par un matériau de liaison se trouvant entre ces derniers et que l'autre surface dudit corps poreux métallique (3) est liée au substrat (1) mentionné ci-dessus par un matériau de liaison se trouvant entre ces derniers lorsque le corps poreux métallique (3) mentionné ci-dessus est placé en sandwich entre l'élément semi-conducteur (1) mentionné ci-dessus et le substrat (2) mentionné ci-dessus. Le corps lié est par ailleurs caractérisé en ce que la résistance mécanique est plus élevée dans la partie centrale dans la direction du plan du corps poreux métallique (3) mentionné ci-dessus que dans la partie périphérique. L'invention concerne par ailleurs un dispositif semi-conducteur muni dudit corps lié.
(JA)
 本発明は、半導体素子(1)と基板(2)とが金属多孔質体(3)を介して接合された接合体であって、前記半導体素子(1)と前記基板(2)との間に前記金属多孔質体(3)が挟まれた状態で、該金属多孔質体(3)の一方の面が接合材を介して前記半導体素子(1)に接合され、該金属多孔質体(3)の他方の面が接合材を介して前記基板(2)に接合されており、前記金属多孔質体(3)の面内方向における中心部の機械的強度が周辺部よりも高いことを特徴とする接合体、および、それを備えた半導体装置である。
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