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1. WO2009058449 - PROCÉDÉ PERMETTANT DE SUPPRIMER DES DÉFAUTS DE RÉSEAU DANS UN SUBSTRAT SEMI-CONDUCTEUR

Numéro de publication WO/2009/058449
Date de publication 07.05.2009
N° de la demande internationale PCT/US2008/071572
Date du dépôt international 30.07.2008
CIB
H01L 21/322 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
02Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
04les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
18les dispositifs ayant des corps semi-conducteurs comprenant des éléments du groupe IV de la classification périodique, ou des composés AIIIBV, avec ou sans impuretés, p.ex. des matériaux de dopage
30Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes H01L21/20-H01L21/26162
322pour modifier leurs propriétés internes, p.ex. pour produire des défectuosités internes
CPC
H01L 21/26506
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26Bombardment with radiation
263with high-energy radiation
265producing ion implantation
26506in group IV semiconductors
H01L 21/26513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26Bombardment with radiation
263with high-energy radiation
265producing ion implantation
26506in group IV semiconductors
26513of electrically active species
H01L 21/324
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
H01L 29/1054
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
1025Channel region of field-effect devices
1029of field-effect transistors
1033with insulated gate, e.g. characterised by the length, the width, the geometric contour or the doping structure
1054with a variation of the composition, e.g. channel with strained layer for increasing the mobility
H01L 29/1079
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
10with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
107Substrate region of field-effect devices
1075of field-effect transistors
1079with insulated gate
H01L 29/7848
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7842means for exerting mechanical stress on the crystal lattice of the channel region, e.g. using a flexible substrate
7848the means being located in the source/drain region, e.g. SiGe source and drain
Déposants
  • SYNOPSYS, INC. [US]/[US] (AllExceptUS)
  • MOROZ, Victor [US]/[US] (UsOnly)
  • PRAMANIK, Dipankar [US]/[US] (UsOnly)
Inventeurs
  • MOROZ, Victor
  • PRAMANIK, Dipankar
Mandataires
  • SUZUE, Kenta
Données relatives à la priorité
11/928,14230.10.2007US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) METHOD FOR SUPPRESSING LATTICE DEFECTS IN A SEMICONDUCTOR SUBSTRATE
(FR) PROCÉDÉ PERMETTANT DE SUPPRIMER DES DÉFAUTS DE RÉSEAU DANS UN SUBSTRAT SEMI-CONDUCTEUR
Abrégé
(EN)
A method for suppressing the formation of leakage-promoting defects in a crystal lattice following dopant implantation in the lattice. The process provides a compressive layer of atoms, these atoms having a size greater than that of the lattice member atoms. The lattice is then annealed for a time sufficient for interstitial defect atoms to be emitted from the compressive layer, and in that manner energetically stable defects are formed in the lattice at a distance from the compressive layer.
(FR)
L'invention concerne un procédé visant à supprimer la formation de défauts favorisant les fuites dans un réseau cristallin, suite à une implantation de dopant dans le réseau. Ce procédé fait inetrvenir une couche d'atomes comprimée dont les atomes présentent une dimension supérieure à celle des atomes du réseau. Le réseau est ensuite recuit pendant suffisamment longtemps pour que des atomes de défauts interstitiels puissent être émis par la couche comprimée. De cette manière, des défauts énergétiquement stables se forment dans le réseau, à une certaine distance de la couche comprimée.
Dernières données bibliographiques dont dispose le Bureau international