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1. WO2008005378 - MATÉRIAU DIÉLECTRIQUE DE GRILLE POUR DES TRANSISTORS À MODE D'ENRICHISSEMENT DE GROUPE III-V

Numéro de publication WO/2008/005378
Date de publication 10.01.2008
N° de la demande internationale PCT/US2007/015225
Date du dépôt international 28.06.2007
CIB
H01L 21/31 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
02Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
04les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
18les dispositifs ayant des corps semi-conducteurs comprenant des éléments du groupe IV de la classification périodique, ou des composés AIIIBV, avec ou sans impuretés, p.ex. des matériaux de dopage
30Traitement des corps semi-conducteurs en utilisant des procédés ou des appareils non couverts par les groupes H01L21/20-H01L21/26162
31pour former des couches isolantes en surface, p.ex. pour masquer ou en utilisant des techniques photolithographiques; Post-traitement de ces couches; Emploi de matériaux spécifiés pour ces couches
CPC
H01L 29/20
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
12characterised by the materials of which they are formed
20including, apart from doping materials or other impurities, only AIIIBV compounds
H01L 29/513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
43characterised by the materials of which they are formed
49Metal-insulator-semiconductor electrodes, ; e.g. gates of MOSFET
51Insulating materials associated therewith
511with a compositional variation, e.g. multilayer structures
513the variation being perpendicular to the channel plane
H01L 29/518
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
43characterised by the materials of which they are formed
49Metal-insulator-semiconductor electrodes, ; e.g. gates of MOSFET
51Insulating materials associated therewith
518the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
H01L 29/66522
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66522with an active layer made of a group 13/15 material
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
Déposants
  • INTEL CORPORATION [US]/[US] (AllExceptUS)
  • METZ, Matthew, V. [US]/[US] (UsOnly)
  • DOCZY, Mark, L. [US]/[US] (UsOnly)
  • DATTA, Suman [IN]/[US] (UsOnly)
Inventeurs
  • METZ, Matthew, V.
  • DOCZY, Mark, L.
  • DATTA, Suman
Mandataires
  • VINCENT, Lester, J.
Données relatives à la priorité
11/479,90330.06.2006US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) GATE DIELECTRIC MATERIALS FOR GROUP III-V ENHANCEMENT MODE TRANSISTORS
(FR) MATÉRIAU DIÉLECTRIQUE DE GRILLE POUR DES TRANSISTORS À MODE D'ENRICHISSEMENT DE GROUPE III-V
Abrégé
(EN)
A method for fabricating a transistor having a Group III-V semiconductor substrate with an oxygen-free dielectric disposed between the substrate and a gate is described.
(FR)
L'invention concerne un procédé de fabrication d'un transistor comportant un substrat semi-conducteur de Groupe III-V incluant un matériau diélectrique exempt d'oxygène disposé entre le substrat et la grille.
Également publié en tant que
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