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1. WO2007149666 - STRUCTURE ET PROCÉDÉ DE RÉALISATION D'UN TRANSISTOR À EFFET DE CHAMP AVEC TRANCHÉE, GRILLE ET BLINDAGE DONT LES ÉLECTRODES DE BLINDAGE ET DE GRILLE SONT RELIÉES L'UNE À L'AUTRE

Numéro de publication WO/2007/149666
Date de publication 27.12.2007
N° de la demande internationale PCT/US2007/069329
Date du dépôt international 21.05.2007
CIB
H01L 29/76 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
29Dispositifs à semi-conducteurs spécialement adaptés au redressement, à l'amplification, à la génération d'oscillations ou à la commutation et ayant au moins une barrière de potentiel ou une barrière de surface; Condensateurs ou résistances ayant au moins une barrière de potentiel ou une barrière de surface, p.ex. jonction PN, région d'appauvrissement, ou région de concentration de porteurs de charges; Détails des corps semi-conducteurs ou de leurs électrodes
66Types de dispositifs semi-conducteurs
68commandables par le seul courant électrique fourni ou par la seule tension appliquée, à une électrode qui ne transporte pas le courant à redresser, amplifier ou commuter
76Dispositifs unipolaires
CPC
H01L 21/823437
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
823437with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
H01L 27/088
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
08including only semiconductor components of a single kind
085including field-effect components only
088the components being field-effect transistors with insulated gate
H01L 29/407
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
407Recessed field plates, e.g. trench field plates, buried field plates
H01L 29/42368
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
4232with insulated gate
42364characterised by the insulating layer, e.g. thickness or uniformity
42368the thickness being non-uniform
H01L 29/66734
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
66674DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
66712Vertical DMOS transistors, i.e. VDMOS transistors
66734with a step of recessing the gate electrode, e.g. to form a trench gate electrode
H01L 29/7811
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
7802Vertical DMOS transistors, i.e. VDMOS transistors
7811with an edge termination structure
Déposants
  • FAIRCHILD SEMICONDUCTOR CORPORATION [US/US]; 82 Running Hill Road South Portland, Maine 04106-0022, US (AllExceptUS)
  • KRAFT, Nathan [US/US]; US (UsOnly)
  • KOCON, Christopher, Boguslaw [US/US]; US (UsOnly)
  • THORUP, Paul [US/US]; US (UsOnly)
Inventeurs
  • KRAFT, Nathan; US
  • KOCON, Christopher, Boguslaw; US
  • THORUP, Paul; US
Mandataires
  • SANI, Barmak ; Two Embarcadero Center, 8th Floor San Francisco, California 94111-3834, US
Données relatives à la priorité
11/471,27919.06.2006US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) STRUCTURE AND METHOD FOR FORMING A SHIELDED GATE TRENCH FET WITH THE SHIELD AND GATE ELECTRODES BEING CONNECTED TOGETHER
(FR) STRUCTURE ET PROCÉDÉ DE RÉALISATION D'UN TRANSISTOR À EFFET DE CHAMP AVEC TRANCHÉE, GRILLE ET BLINDAGE DONT LES ÉLECTRODES DE BLINDAGE ET DE GRILLE SONT RELIÉES L'UNE À L'AUTRE
Abrégé
(EN)
A field effect transistor (FET) includes a plurality of trenches extending into a semiconductor region. Each trench includes a gate electrode and a shield electrode with an inter-electrode dielectric therebetween, wherein the shield electrode and the gate electrode are electrically connected together.
(FR)
L'invention concerne un transistor à effet de champ (TEC) comportant une pluralité de tranchées se prolongeant dans une région à semi-conducteurs. Chacune des tranchées comporte une électrode de grille et une électrode de blindage, avec un diélectrique placé entre les électrodes, l'électrode de blindage et l'électrode de grille étant reliées l'une à l'autre.
Dernières données bibliographiques dont dispose le Bureau international