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1. WO2007145695 - CIRCUITS CMOS À FAIBLE RÉSISTANCE DE CONTACT ET LEUR PROCÉDÉ DE FABRICATION

Numéro de publication WO/2007/145695
Date de publication 21.12.2007
N° de la demande internationale PCT/US2007/007549
Date du dépôt international 29.03.2007
Demande présentée en vertu du Chapitre 2 09.04.2008
CIB
H01L 21/8238 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
70Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun, ou de parties constitutives spécifiques de ceux-ci; Fabrication de dispositifs à circuit intégré ou de parties constitutives spécifiques de ceux-ci
77Fabrication ou traitement de dispositifs consistant en une pluralité de composants à l'état solide ou de circuits intégrés formés dans ou sur un substrat commun
78avec une division ultérieure du substrat en plusieurs dispositifs individuels
82pour produire des dispositifs, p.ex. des circuits intégrés, consistant chacun en une pluralité de composants
822le substrat étant un semi-conducteur, en utilisant une technologie au silicium
8232Technologie à effet de champ
8234Technologie MIS
8238Transistors à effet de champ complémentaires, p.ex. CMOS
H01L 27/092 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
27Dispositifs consistant en une pluralité de composants semi-conducteurs ou d'autres composants à l'état solide formés dans ou sur un substrat commun
02comprenant des composants semi-conducteurs spécialement adaptés pour le redressement, l'amplification, la génération d'oscillations ou la commutation et ayant au moins une barrière de potentiel ou une barrière de surface; comprenant des éléments de circuit passif intégrés avec au moins une barrière de potentiel ou une barrière de surface
04le substrat étant un corps semi-conducteur
08comprenant uniquement des composants semi-conducteurs d'un seul type
085comprenant uniquement des composants à effet de champ
088les composants étant des transistors à effet de champ à porte isolée
092Transistors à effet de champ métal-isolant-semi-conducteur complémentaires
CPC
H01L 21/28518
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
283Deposition of conductive or insulating materials for electrodes ; conducting electric current
285from a gas or vapour, e.g. condensation
28506of conductive layers
28512on semiconductor bodies comprising elements of Group IV of the Periodic System
28518the conductive layers comprising silicides
H01L 21/28537
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
283Deposition of conductive or insulating materials for electrodes ; conducting electric current
285from a gas or vapour, e.g. condensation
28506of conductive layers
28512on semiconductor bodies comprising elements of Group IV of the Periodic System
28537Deposition of Schottky electrodes
H01L 21/76846
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76838characterised by the formation and the after-treatment of the conductors
76841Barrier, adhesion or liner layers
76843formed in openings in a dielectric
76846Layer combinations
H01L 21/823814
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823814with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
H01L 21/823835
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823828with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
823835silicided or salicided gate conductors
H01L 21/823871
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823871interconnection or wiring or contact manufacturing related aspects
Déposants
  • ADVANCED MICRO DEVICES, INC [US/US]; One Amd Place Mail Stop 68 P.o. Box 3453 Sunnyvale, CA 94088-3453, US (AllExceptUS)
  • BESSER, Paul, R. [US/US]; US (UsOnly)
Inventeurs
  • BESSER, Paul, R.; US
Mandataires
  • DRAKE, Paul, S.; Advanced Micro Devices, Inc 5204 East Ben White Boulevard Mail Stop 562 Austin, TX 78741, US
Données relatives à la priorité
11/424,37315.06.2006US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) LOW CONTACT RESISTANCE CMOS CIRCUITS AND METHODS FOR THEIR FABRICATION
(FR) CIRCUITS CMOS À FAIBLE RÉSISTANCE DE CONTACT ET LEUR PROCÉDÉ DE FABRICATION
Abrégé
(EN)
A low contact resistance CMOS integrated circuit [50] and method for its fabrication are provided. The CMOS integrated circuit [50] comprises a first transition metal [102] electrically coupled to the N-type circuit regions [72, 74] and a second transition metal [98] different than the first transition metal electrically coupled to the P-type circuit regions [76, 78]. A conductive barrier layer [104] overlies each of the first transition metal and the second transition metal and a plug metal [110] overlies the conductive barrier layer.
(FR)
La présente invention concerne un circuit intégré CMOS [50] à faible résistance de contact et son procédé de fabrication. Le circuit intégré CMOS [50] comprend un premier métal de transition [102] couplé électriquement aux zones de circuit de type N [72, 74] et un second métal de transition [98] différent du premier métal de transition électriquement couplé aux zones de circuit de type P [76, 78]. Une couche écran conductrice [104] recouvre chacun des premier et second métaux de transition et un métal de branchement [110] recouvre la couche écran conductrice.
Également publié en tant que
GB0822594.8
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