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Paramétrages

Paramétrages

1. WO2005067161 - SYSTEME RADIO A SPECTRE ETALE HYBRIDE

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CLAIMS

What is claimed is:

1. A method, comprising modulating a signal by utilizing a subset of bits from a pseudo-random code generator to control an amplification circuit that provides a gain to the signal.

2. The method of claim 1, wherein the signal includes a spread spectrum signal.

3. The method of claim 2, wherein the spread spectrum signal includes a direct sequence spread spectrum signal.

4. The method of claim 1, further comprising frequency hopping the signal.

5. The method of claim 4, wherein multiple frequency hops occur within a single data-bit time.

6. The method of claim 4, wherein frequency hopping includes frequency sweeping.

7. The method of claim 1, further comprising time hopping the signal.

8. The method of claim 1, wherein modulating the signal includes amplitude dithering the signal.

9. The method of claim 1, further comprising modulating a polarization of the signal.

10. The method of claim 9, wherein modulating the polarization of the signal includes controlling feed power levels to antennas of orthogonal polarizations.

11. The method of claim 1 , further comprising transmitting the signal to a radio frequency tag and receiving a transformed version of the signal from the radio frequency tag.

12. A computer program, comprising computer or machine readable program elements translatable for implementing the method of claim 1.

13. The method of claim 1, further comprising transmitting the signal.

14. An electronic medium, comprising a program for performing the method of claim 1.

15. An apparatus, comprising:
a pseudo-random code generator; and
an amplitude controller coupled to the pseudo-random code generator.

16. The apparatus of claim 15, further comprising an amplification circuit coupled to the amplitude controller.

17. The apparatus of claim 15, further comprising a signal attenuator circuit coupled to the amplitude controller.

18. The apparatus of claim 15, further comprising a coincidence gate coupled to the pseudo-random code generator and a switch coupled between the coincidence gate and the amplification circuit.

19. The apparatus of claim 15, further comprising a fast hopping frequency synthesizer coupled to the pseudo-random code generator.

20. A method, comprising: directly synthesizing a digital signal including:
amplitude modulating an output channel with a four-quadrant amplitude multiplier to provide an amplitude dithered signal.

21. The method of claim 20, further comprising transforming the channel with an equalizer.

22. The method of claim 21 , further comprising programming the equalizer.

23. The method of claim 20, further comprising transmitting the digital signal to a radio frequency tag and receiving a transformed version of the digital signal from the radio frequency tag.

24. An apparatus, comprising a direct digital synthesizer including a four-quadrant amplitude multiplier, wherein the direct digital synthesizer provides an amplitude dithered signal.

25. The apparatus of claim 24, further comprising a first equalizer coupled to the four- quadrant amplitude multiplier.

26. The apparatus of claim 25, wherein the equalizer includes a finite-impulse-response filter.

27. The apparatus of claim 26, wherein the finite-impulse-response filter is programmable.

28. The apparatus of claim 27, further comprising a logic interface coupled to the integrated circuit.

29. The apparatus of claim 28, wherein the logic interface includes a field programmable gate array.

30. An integrated circuit, comprising the apparatus of claim 24.

31. The integrated circuit of claim 30 further comprising a coupled receiver.

32. A system, comprising the integrated circuit of claim 31 and a radio frequency tag.

33. A method, comprising: directly synthesizing a digital signal including:
amplitude modulating an in-phase channel with a first four quadrant amplitude multiplier; and
amplitude modulating a quadrature-phase channel with a second four quadrant amplitude multiplier.

34. The method of claim 33, further comprising:
transforming the in-phase channel with a first equalizer; and
transforming the quadrature-phase channel with a second equalizer.

35. The method of claim 34, further comprising:
programming the first equalizer; and
programming the second equalizer.

36. The method of claim 33, further comprising transmitting the digital signal to a radio frequency tag and receiving a transformed version of the digital signal from the radio frequency tag.

37. An apparatus, comprising a direct digital synthesizer including a first four-quadrant amplitude multiplier and a second four-quadrant amplitude multiplier, wherein the first four-quadrant amplitude multiplier and the second four-quadrant amplitude multiplier are coupled together in parallel.

38. The apparatus of claim 37, further comprising a first equalizer coupled to the first four-quadrant amplitude multiplier and a second equalizer coupled to the second four-quadrant amplitude multiplier.

39. The apparatus of claim 38, wherein the first equalizer includes a first-finite-impulse- response filter and the second equalizer includes a second finite-impulse-response filter.

40. The apparatus of claim 39, wherein the first finite-impulse-response filter is programmable and the second finite-impulse-response filter is programmable.

41. The apparatus of claim 37, further comprising a logic interface coupled to the integrated circuit.

42. The apparatus of claim 41, wherein the logic interface includes a field-programmable gate array.

43. An integrated circuit, comprising the apparatus of claim 37.

44. The integrated circuit of claim 43 further comprising a coupled receiver.

45. A system, comprising the integrated circuit of claim 44 and a radio frequency tag.

46. A circuit board, comprising the integrated circuit of claim 43.

47. A transmitter, comprising the circuit board of claim 46.

48. A broadcasting network, comprising the transmitter of claim 47.

49. A method, comprising:
modulating a signal by utilizing a subset of bits from a pseudo-random code generator to control a fast hopping frequency synthesizer; and
fast frequency hopping the signal with the fast hopping frequency synthesizer, wherein multiple frequency hops occur within a single data-bit time.

50. The method of claim 49, wherein the signal includes a spread spectrum signal.

51. The method of claim 50, wherein the spread spectrum signal includes a direct sequence spread spectrum signal.

52. The method of claim 49, further comprising time hopping the signal.

53. The method of claim 49, wherein the fast hopping frequency synthesizer provides a substantially constant envelope signal.

54. The method of claim 49, wherein fast hopping includes frequency sweeping.

55. The method of claim 49, wherein modulating the signal includes amplitude dithering the signal.

56. The method of claim 49, further comprising modulating a polarization of the signal.

57. The method of claim 56, wherein modulating the polarization of the signal includes controlling feed power levels to antennas of orthogonal polarizations.

58. The method of claim 49, further comprising transmitting the signal to a radio frequency tag and receiving a transformed version of the signal from the radio frequency tag.

59. A computer program, comprising computer or machine readable program elements translatable for implementing the method of claim 49.

60. The method of claim 49, further comprising transmitting the signal.

61. An electronic medium, comprising a program for performing the method of claim 49.

62. An apparatus, comprising:
a pseudo-random code generator; and
a fast hopping frequency synthesizer coupled to the pseudo-random code generator, wherein multiple frequency hops occur within a single data-bit time.

63. The apparatus of claim 62, further comprising an amplitude controller coupled to the pseudo-random code generator.

64. The apparatus of claim 63, further comprising an amplification circuit coupled to the amplitude controller.

65. The apparatus of claim 63, further comprising a signal attenuator circuit coupled to the amplitude controller.

66. The apparatus of claim 62, wherein the fast hopping frequency synthesizer provides a substantially constant envelope signal.

67. The apparatus of claim 62, further comprising a coincidence gate coupled to the pseudo-random code generator and a switch coupled between the coincidence gate and the fast hopping frequency synthesizer.