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1. WO2005006433 - COIFFE DE MATIERE A MOULER DANS UN BOITIER A MATRICES MULTIPLES D'ELEMENTS DOTEES DE CONNEXIONS PAR BILLES ET PROCEDE DE FABRICATION CORRESPONDANT

Numéro de publication WO/2005/006433
Date de publication 20.01.2005
N° de la demande internationale PCT/US2004/020195
Date du dépôt international 23.06.2004
CIB
H01L 21/56 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
02Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
04les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
50Assemblage de dispositifs à semi-conducteurs en utilisant des procédés ou des appareils non couverts par l'un uniquement des groupes H01L21/06-H01L21/326185
56Capsulations, p.ex. couches de capsulation, revêtements
H01L 23/31 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
23Détails de dispositifs à semi-conducteurs ou d'autres dispositifs à l'état solide
28Capsulations, p.ex. couches de capsulation, revêtements
31caractérisées par leur disposition
CPC
H01L 21/563
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
563Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/73204
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73201on the same surface
73203Bump and layer connectors
73204the bump connector being embedded into the layer connector
H01L 23/3135
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
3107the device being completely enclosed
3135Double encapsulation or coating and encapsulation
H01L 2924/00014
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
0001Technical content checked by a classifier
00014the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
Déposants
  • INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, CA 95052, US (AllExceptUS)
Inventeurs
  • LEBONHEUR, Vassoudevane; US
  • HARRIES, Richard; US
Mandataires
  • STEFFEY, Charles, E. ; Schwegman, Lundberg, Woessner & Kluth, P.A. P.O. Box 2938 Minniapolis, MN 55402, US
Données relatives à la priorité
10/612,76430.06.2003US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) MOLD COMPOUND CAP IN A FLIP CHIP MULTI-MATRIX ARRAY PACKAGE AND PROCESS OF MAKING SAME
(FR) COIFFE DE MATIERE A MOULER DANS UN BOITIER A MATRICES MULTIPLES D'ELEMENTS DOTEES DE CONNEXIONS PAR BILLES ET PROCEDE DE FABRICATION CORRESPONDANT
Abrégé
(EN)
A molding compound cap structure is disclosed. A process of forming the molding compound cap structure is also disclosed. A microelectronic package is also disclosed that used the molding compound cap structure. A method of assembling a microelectronic package is also disclosed. A computing system is also disclosed that includes the molding compound cap structure. The molding compound cap includes a configuration that exposes a portion of microelectronic device.
(FR)
La présente invention se rapporte à une structure de coiffe de matière à mouler. Elle se rapporte également à un procédé de formation de ladite structure de coiffe de matière à mouler. L'invention se rapporte aussi à un boîtier micro-électronique qui utilise cette structure de coiffe de matière à mouler. L'invention concerne par ailleurs un procédé d'assemblage d'un boîtier micro-électronique. Elle concerne également un système informatique qui inclut ladite structure de coiffe de matière à mouler. Cette coiffe de matière à mouler inclut une configuration permettant d'exposer une partie d'un dispositif micro-électronique.
Également publié en tant que
GB0520454.0
GBGB0520454.0
Dernières données bibliographiques dont dispose le Bureau international