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1. WO2004095514 - DISPOSITIF A CIRCUIT AU MOINS PARTIELLEMENT ENCAPSULE ET PROCEDE PERMETTANT DE FORMER CE DISPOSITIF A CIRCUIT

Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

[ EN ]

CLAIMS

1. A device with at least partial packaging, comprising:
a circuit device having a first surface and a second surface opposite the first surface, wherein the first surface comprises active circuitry;
an electrically conductive layer having a first surface, a second surface opposite the first surface, and at least one opening, wherein:
the at least one opening at least partially surrounds the circuit device,
the first surface of the circuit device is substantially coplanar with the first
surface of the electrically conductive layer, and
the electrically conductive layer comprises a first reference voltage plane; and an encapsulant layer at least partially filling a gap within the at least one opening
between the circuit device and the electrically conductive layer.

2. The device of claim 1, wherein the encapsulant layer overlies at least a first portion of the second surface of the electrically conductive layer.

3. The device of claim 2, wherein the encapsulant layer overlies at least a portion of the second surface of the circuit device.

4. The device of claim 2, further comprising a second circuit device in physical contact with a second portion of the second surface of the electrically conductive layer.

5. The device of claim 4, wherein the second circuit device is selected from a group consisting of a passive device, an optical device, an active device, and a semiconductor device, an antennae, and a micro-electro-mechanical system (MEMS) device.

6. The device of claim 4, wherein the encapsulant layer overlies at least a portion of the second circuit device.

7. The device of claim 1, wherein the first reference voltage plane is electrically coupled to the circuit device.

8. The device of claim 1, wherein the electrically conductive layer comprises a plurality of interconnect layers.

9. The device of claim 1, wherein the encapsulant layer overlies at least a portion of the second surface of the circuit device.

10. The device of claim 9, wherein the encapsulant layer comprises an electrically conductive material.

11. The device of claim 10, further comprising a second encapsulant layer overlying the encapsulant layer.

12. The device of claim 1, wherein the encapsulant layer comprises an electrically conductive material.

13. The device of claim 1, further comprising a second circuit device having a first terminal coupled to a first physically separate portion of the electrically conductive layer and having a second terminal coupled to a second physically separate portion of the electrically conductive layer.

14. The device of claim 13, further comprising an interconnect layer overlying the first surfaces of the circuit device and the electrically conductive layer, wherein the second circuit device is electrically coupled to the interconnect layer via the first and second physically separate portions.

15. The device of claim 1, wherein the electrically conductive layer comprises at least two portions which are electrically isolated from each other.

16. The device of claim 15, wherein one of the at least two portions comprises the first voltage reference plane.

17. The device of claim 16, wherein another one of the at least two portions comprises a second voltage reference plane.

18. The device of claim 17, further comprising a second circuit device having a first terminal coupled to the first voltage reference plane and a second terminal coupled to the second voltage reference plane.

19. The device of claim 1, further comprising an interconnect layer overlying the first surfaces of the circuit device and the electrically conductive layer.

20. The device of claim 19, wherein the interconnect layer comprises a plurality of interconnect levels.

21. The device of claim 19, further comprising a compliant layer overlying the interconnect layer.

22. The device of claim 21, wherein the compliant layer comprises a plurality of electrically conductive vias coupled to the interconnect layer.

23. The device of claim 22, further comprising a plurality of conductive balls coupled to the electrically conductive vias.

24. The device of claim 19, wherein the interconnect layer comprises a same material as the encapsulant layer.

25. The device of claim 24, wherein the same material is a material selected from a group consisting of liquid crystal polymer and polyphenylene sulfide (PPS).

26. The device of claim 1, further comprising a plurality of circuit devices, wherein the electrically conductive layer comprises a plurality of openings, wherein each of the plurality of openings at least partially surrounds one of the plurality of circuit devices.

27. The device of claim 26, wherein each of the plurality of circuit devices has a first surface comprising active circuitry and a second surface opposite the first surface, wherein the first surfaces of each of the plurality of the circuit devices is substantially coplanar with the first surface of the electrically conductive layer.

28. The device of claim 27, wherein the encapsulant layer overlies at least a portion of the second surfaces of the plurality of circuit devices.

29. The device of claim 28, wherein the encapsulant layer comprises an electrically conductive material.

30. A device with at least partial packaging, comprising:
a circuit device having a first surface and a second surface opposite the first surface, wherein the first surface comprises active circuitry;
an electrically conductive frame having a first surface, a second surface opposite the first surface, and at least one opening, wherein:
the circuit device is within the at least one opening,
the first surface of the circuit device is substantially coplanar with the first
surface of the electrically conductive frame, and
the electrically conductive frame comprises a reference voltage plane; and an encapsulant overlying the second surface of the circuit device and the second
surface of the electrically conductive frame.

31. The device of claim 30, further comprising a second circuit device in physical contact with a first portion of the second surface of the electrically conductive layer.

32. The device of claim 31, wherein the second circuit device is selected from a group consisting of a passive device, an optical device, an active device, and a semiconductor device, an antennae, and a micro-electro-mechanical system (MEMS) device.

33. The device of claim 31, wherein the encapsulant layer overlies the second circuit device.

34. The device of claim 30, wherein the encapsulant layer comprises an electrically conductive material.

35. The device of claim 30, wherein the encapsulant layer comprises an electrically conductive portion overlying the second surface of the circuit device.

36. The device of claim 30, wherein the electrically conductive layer comprises at least two portions electrically isolated from each other, wherein one of the at least two portions comprises the reference voltage plane.

37. The device of claim 36, further comprising a second circuit device having a first terminal coupled to one of the at least two portions and a second terminal coupled to another one of the at least two portions.

38. A method for forming a device having at least partial packaging, comprising:
providing an electrically conductive layer having a first surface, a second surface
opposite the first surface, and at least one opening;
placing a circuit device within the at least one opening, wherein an active surface of the circuit device is substantially coplanar with the first surface of the
electrically conductive layer, and wherein the electrically conductive layer
comprises a reference voltage plane; and
forming an encapsulant layer to at least partially fill a gap within the at least one
opening between the circuit device and the electrically conductive layer.

39. The method of claim 38, further comprising:
attaching an adhesive layer to the electrically conductive layer, wherein placing the
circuit device within the at least one opening comprises placing the circuit
device on the adhesive layer.

40. The method of claim 39, further comprising removing the adhesive layer after forming the encapsulant layer.

41. The method of claim 38, wherein forming the encapsulant layer comprises forming a mold compound overlying the circuit device and the second surface of the electrically conductive layer.

42. A device with at least partial packaging, comprising:
a circuit device having a first surface, a second surface opposite the first surface, and sidewall surfaces substantially perpendicular to the first and second surfaces,
wherein the first surface comprises active circuitry; and
an electrically conductive encapsulant overlying the sidewall surfaces and the second surface of the circuit device and exposing at least a portion of the first surface of the circuit device.

43. The device of claim 42, wherein the electrically conductive encapsulant comprises a reference voltage plane.

44. The device of claim 43, wherein the electrically conductive encapsulant is electrically coupled to the circuit device.

45. The device of claim 42, wherein the electrically conductive encapsulant has a first
surface that is coplanar with the first surface of the circuit device.

46. A device with at least partial packaging, comprising:
an electrically conductive layer having a first surface and a second surface, opposite the first surface;
a circuit device overlying the electrically conductive layer, the circuit device having a first surface and a second surface opposite the first surface, wherein the first
surface comprises active circuitry, and the first surface of the circuit device is
between the second surface of the circuit device and the first surface of the
electrically conductive layer; and
an encapsulant layer overlying the first surface of the electrically conductive layer.

47. The device of claim 46, further comprising an adhesive layer between the first surface of the circuit device and the first surface of the electrically conductive layer.

48. The device of claim 46, wherein the encapsulant layer overlies the second surface of the circuit device.

49. The device of claim 46, wherein at least two portions of the electrically conductive layer extend through the encapsulant layer, and wherein the device further comprises a second circuit device having a first terminal coupled to one of the at least two portions of the electrically conductive layer and a second terminal coupled to another one of the at least two portions of the electrically conductive layer.

50. The device of claim 49, wherein the second circuit device is selected from a group consisting of a passive device, an optical device, an active device, a semiconductor device, an antennae, and a micro-electro-mechanical system (MEMS) device.

51. The device of claim 46, wherein the electrically conductive layer comprises a lead frame.

52. The device of claim 46, wherein the electrically conductive layer comprises at least one opening that exposes at least a portion of the first surface of the circuit device.

53. The device of claim 46, wherein the encapsulant layer comprises an electrically conductive material.

54. The device of claim 46, wherein the encapsulant layer comprises an electrically conductive portion overlying the second surface of the circuit device.

55. The device of claim 46, further comprising a second circuit device having a first terminal and a second terminal, wherein the first terminal is coupled to a first physically separate portion of the electrically conductive layer and the second terminal is coupled to a second physically separate portion of the electrically conductive layer.

56. The device of claim 55, wherein the encapsulant layer overlies the second circuit device.

57. The device of claim 46, wherein the electrically conductive layer comprises at least two portions electrically isolated from each other.

58. The device of claim 57, wherein one of the at least two portions comprises a first voltage reference plane.

59. The device of claim 58, wherein another one of the at least two portions comprises a second voltage reference plane.

60. The device of claim 59, further comprising a second circuit device having a first terminal coupled to the first voltage reference plane and a second terminal coupled to the second voltage reference plane.

61. The device of claim 46, further comprising an interconnect layer overlying the second surface of the electrically conductive layer.

62. The device of claim 61, wherein the interconnect layer comprises a plurality of interconnect levels.

63. The device of claim 61, further comprising a compliant layer overlying the interconnect layer.

64. The device of claim 63, wherein the compliant layer comprises a plurality of electrically conductive vias coupled to the interconnect layer.

65. The device of claim 64, further comprising a plurality of conductive balls coupled to the electrically conductive vias.

66. The device of claim 61, wherein the interconnect layer comprises a same material as the encapsulant layer.

67. The device of claim 66, wherein the same material is a material selected from a group consisting of liquid crystal polymer and PPS.

68. The device of claim 46, further comprising a plurality of circuit devices overlying the first surface of the electrically conductive layer, each of the plurality of circuit devices having a first surface comprising active circuitry and a second surface opposite the first surface, wherein the first surfaces of each of the plurality of the circuit devices is between the second surfaces of each of the plurality of circuit devices and the first surface of the electrically conductive layer.

69. The device of claim 68, wherein the encapsulant layer overlies at least a portion of the second surfaces of the plurality of circuit devices.

70. The device of claim 69, wherein the encapsulant layer comprises an electrically conductive material.

71. The device of claim 46, wherein the electrically conductive layer comprises a plurality of interconnect layers.

72. The device of claim 46, wherein the electrically conductive layer comprises a reference voltage plane.

73. The device of claim 72 wherein the reference voltage plane comprises a ground plane.

74. A device with at least partial packaging, comprising:
an electrically conductive layer having a first surface and a second surface, opposite the first surface;
an adhesive layer overlying and in physical contact with the first surface of the
electrically conductive layer;
a circuit device overlying the adhesive layer, the circuit device having a first surface and a second surface opposite the first surface, wherein the first surface
comprises active circuitry and is in physical contact with the adhesive layer; and an encapsulant layer overlying the first surface of the electrically conductive layer.

75. The device of claim 74, wherein the encapsulant layer overlies the second surface of the circuit device.

76. The device of claim 74, wherein the electrically conductive layer comprises at least one opening that exposes at least a portion of the first surface of the circuit device.

77. The device of claim 74, wherein the encapsulant layer comprises an electrically conductive material.

78. The device of claim 74, wherein the encapsulant layer comprises an electrically conductive portion overlying the second surface of the second device.

79. The device of claim 74, further comprising a second circuit device having a first terminal and a second terminal, wherein the first terminal is coupled to a first physically separate portion of the electrically conductive layer and the second terminal is coupled to a second physically separate portion of the electrically conductive layer.

80. The device of claim 79, wherein the encapsulant layer overlies the second circuit device.

81. The device of claim 74, wherein the electrically conductive layer comprises a ground reference plane.

82. A method for forming a device with at least partial packaging, comprising:
providing an electrically conductive layer having a first surface and a second surface opposite the first surface;
positioning a circuit device over the electrically conductive layer, the circuit device
having a first surface and a second surface opposite the first surface, wherein the first surface comprises active circuitry and the first surface of the circuit device is between the second surface of the circuit device and the first surface of the
electrically conductive layer; and
forming an encapsulant layer overlying the first surface of the electrically conductive layer.

83. The method of claim 82, wherein positioning the circuit device comprises adhering the first surface of the circuit device to the electrically conductive layer.

84. The method of claim 82, wherein forming the encapsulant layer comprises forming the encapsulant layer overlying circuit device.