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1. AU2003248685 - Sequential dc offset correction for amplifier chain

Office
Australie
Numéro de la demande 2003248685
Date de la demande 13.06.2003
Numéro de publication 2003248685
Date de publication 16.10.2003
Type de publication A
CIB
H03F 3/45
HÉLECTRICITÉ
03CIRCUITS ÉLECTRONIQUES FONDAMENTAUX
FAMPLIFICATEURS
3Amplificateurs comportant comme éléments d'amplification uniquement des tubes à décharge ou uniquement des dispositifs à semi-conducteurs
45Amplificateurs différentiels
CPC
H03F 3/45977
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
45Differential amplifiers
45071with semiconductor devices only
45479characterised by the way of common mode signal rejection
45928using IC blocks as the active amplifying circuit
45968by offset reduction
45973by using a feedback circuit
45977using switching means, e.g. sample and hold
H03F 3/34
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
34Dc amplifiers in which all stages are dc-coupled
H03F 1/30
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
30Modifications of amplifiers to reduce influence of variations of temperature or supply voltage ; or other physical parameters
Déposants SKYWORKS SOLUTIONS, INC.
Inventeurs Magoon, Rahul
Molnar, Alyosha C.
Données relatives à la priorité 10170507 13.06.2002 US
Titre
(EN) Sequential dc offset correction for amplifier chain
Abrégé
(EN) An amplifier chain with sequential DC offset correction for use in a radio receiver is provided. The amplifier chain has at least first and second amplifier stages connected in series. The first and second stages include an amplifier and a track and hold circuit connected in parallel across the amplifier. The track and hold circuit has a tracking state and a holding state. A control signal is coupled to the track and hold circuits of the first and second stages. The control signal is configured to set the track and hold circuits to the tracking state, which may be done simultaneously, and to sequentially set the track and hold circuit of the first stage to the holding state and then set the track and hold circuit of the second stage to the holding state.