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1. (WO2018039674) WAKE UP RECEIVER USING MULTIPHASE PEAK DETECTOR AND DEMODULATOR
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CLAIMS

What is claimed is:

1. A wireless receiver comprising:

a peak detector coupled to receive a plurality of phases of an input signal and to provide a detector output, the plurality of phases being substantially in quadrature; and

a demodulator comprising an analog comparator coupled to receive the detector output and to provide a comparator output.

2. The wireless receiver as recited in claim 1 wherein each of the plurality of phases of the input signal is coupled with a respective transistor biased close to the transistor's threshold voltage.

3. The wireless receiver as recited in claim 2 wherein the demodulator further comprises a translator circuit that translates the comparator output to determine a digital output signal, the translator circuit using an internally generated signal as a threshold value to determine the digital output signal.

4. The wireless receiver as recited in claim 3 wherein the peak detector provides a single peak detector output.

5. The wireless receiver as recited in claim 4 wherein the translator circuit is coupled to provide the digital output signal by using a value provided by a comparator associated with at least one previous gain/filter stage as a threshold value for the comparator output.

6. The wireless receiver as recited in claim 3 wherein the peak detector provides differential peak detector outputs.

7. The wireless receiver as recited in claim 6 wherein the demodulator is coupled to use the differential peak detector outputs to provide the digital output signal.

8. The wireless receiver as recited in claim 3 wherein the peak detector comprises at least one low impedance point that reduces a time constant associated with operation of the peak detector.

9. The wireless receiver as recited in claim 8 further comprising

a first mixer connected to mix received differential signals from an antenna with first differential signals from a first local oscillator to create first mixer output signals;

a first plurality of N gain/filter stages connected in series to receive the first mixer output signals, each of the first plurality of gain/filter stages providing a gain/filter output signal to a successive gain/filter stage and N being an integer;

a second mixer connected to mix the received differential signals with second differential signals from a second local oscillator to create second mixer output signals, the first mixer output signals and the second mixer output signals being in quadrature; and

a second plurality of N gain/filter stages connected in series to receive the second mixer output signals, each of the second plurality of gain/filter stages providing a gain/filter output signal to a successive gain/filter stage.

10. The wireless receiver as recited in claim 9 wherein the peak detector and the demodulator are one of a plurality of peak detector/demodulator pairs and a gain/filter stage of the first plurality of gain/filter stages and a respective gain/filter stage of the second plurality of gain/filter stages provide respective gain/filter output signals to respective ones of the peak detector/demodulator pairs, wherein gain from each of the gain/filter stages is lower than a linear dynamic range of a respective peak detector.

11. The wireless receiver as recited in claim 10 wherein the peak detector/demodulator pairs, the first and second mixers and the first and second plurality of N gain/filter stages are all DC compatible.

12. The wireless receiver as recited in claim 10 wherein a final demodulation is performed by comparing a detector output of an ΝΛ peak detector and a detector output of an (N-k)th peak detector, where k>l .

13. The wireless receiver as recited in claim 10 wherein a final demodulation is performed by comparing a detector output of an ΝΛ peak detector and a linear combination of comparator outputs from a plurality of previous stages, the linear combination using a formula, DO,N = pD(N) - pD(N-k) where D0,N denotes the comparator output of an ΝΛ stage, k is an integer less than N, and VPD,N denotes a detector output of an ΝΛ stage.

14. The wireless receiver as recited in claim 7 further comprising:

a mixer coupled to mix received differential signals from an antenna with differential signals from a local oscillator to create a mixer output signal;

a plurality of gain/filter stages coupled in series to receive the mixer output signal and to provide a gain/filter output to a successive gain/filter stage; and

a plurality of quadrature phase shifters, each coupled to receive respective gain/filter outputs and to provide N respective phase shifter output signals that are in quadrature.

15. The wireless receiver as recited in claim 14 wherein the peak detector and demodulator are one of a plurality of peak detector/demodulator pairs and the N respective phase shifter output signals are provided to respective peak detector/demodulator pairs.

16. The wireless receiver as recited in claim 14 wherein the plurality of quadrature phase shifters each comprise a cyclic arrangement of resistors and capacitors that provide the N phase shifter outputs and retains DC common mode levels from the respective gain/filter outputs to the respective phase shifter output signals.

17. The wireless receiver as recited in claim 14 wherein the plurality of quadrature phase shifters each comprise an arrangement of up-converting mixers.

18. The wireless receiver as recited in claim 16 wherein the plurality of quadrature phase shifters consume substantially no power and require no process trimming.

19. The wireless receiver as recited in claim 14, wherein the peak detector/demodulator pairs, the mixer, the plurality of N gain/filter stages, and the plurality of quadrature phase shifters are all DC compatible.

20. The wireless receiver as recited in claim 14 wherein a final demodulation is performed by comparing a detector output of an ΝΛ peak detector and a detector output of an (N-k)th peak detector, where k>l .

21. The receiver as recited in claim 10 wherein a final demodulation is performed by comparing a detector output of an ΝΛ peak detector and a linear combination of comparator outputs from a plurality of previous stages, the linear combination using a formula, DO,N = VPD(N) - pD(N-k), where D0,N denotes the comparator output of an ΝΛ stage, k is an integer less than N, and VPD,N denotes a detector output of an ΝΛ stage.