检索国际和国家专利汇编

1. (WO2016199556) MEMORY DEVICE AND MEMORY SYSTEM

Pub. No.:    WO/2016/199556    International Application No.:    PCT/JP2016/064772
Publication Date: Fri Dec 16 00:59:59 CET 2016 International Filing Date: Thu May 19 01:59:59 CEST 2016
IPC: H01L 27/105
H01L 27/10
H01L 45/00
H01L 49/00
Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
ソニーセミコンダクタソリューションズ株式会社
Inventors: TERADA, Haruhiko
寺田 晴彦
Title: MEMORY DEVICE AND MEMORY SYSTEM
Abstract:
Provided is a memory device having a structure suitable for higher integration while ensuring ease of manufacture. The memory device is provided with n memory cell units which are layered on a substrate successively from a first memory cell unit to an n-th memory cell unit in a first direction. Each of the n memory cell units includes: one or more first electrodes; a plurality of second electrodes each of which is disposed so as to intersect the first electrode; a plurality of memory cells which are disposed at points of intersection of the first electrode and each of the plurality of second electrodes, and which are respectively connected to both the first electrode and the second electrodes; and one or more lead-out wires connected to the first electrode and forming one or more connection portions. At least one connection portion in a (m + 1)-th memory cell unit is positioned so as to overlap, in a first direction, an m-th memory cell region surrounded by a plurality of memory cells in the m-th memory cell unit.