국제 및 국내 특허문헌 검색

1. (WO2018020695) HEAT DISSIPATION SUBSTRATE, SEMICONDUCTOR PACKAGE, SEMICONDUCTOR MODULE AND HEAT DISSIPATION SUBSTRATE MANUFACTURING METHOD

Pub. No.:    WO/2018/020695    International Application No.:    PCT/JP2016/081489
Publication Date: Fri Feb 02 00:59:59 CET 2018 International Filing Date: Tue Oct 25 01:59:59 CEST 2016
IPC: H01L 23/36
H01L 23/12
H05K 1/02
Applicants: SUPERUFO291 TEC
株式会社半導体熱研究所
Inventors: FUKUI, Akira
福井 彰
Title: HEAT DISSIPATION SUBSTRATE, SEMICONDUCTOR PACKAGE, SEMICONDUCTOR MODULE AND HEAT DISSIPATION SUBSTRATE MANUFACTURING METHOD
Abstract:
In the present invention, a main body is made by introducing an insert, which uses as a core material a second metal having a greater thermal conductivity than a first metal, such that the insert passes through, in the thickness direction, a slab-shaped core base material using the first metal as a core material; a laminate is made by arranging, on the front and back surfaces of the main body, slab-shaped thermal conductive materials using as a core material a third metal having a greater thermal conductivity than the first metal; and a heat dissipation substrate is manufactured by subjecting the laminate to discharge plasma sintering at a temperature less than the melting points of the first metal, the second metal and the third metal.