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1. (WO2011013673) WIRING SUBSTRATE AND MANUFACTURING METHOD FOR WIRING SUBSTRATE
국제사무국에 기록된 최신 서지정보   

공개번호: WO/2011/013673 국제출원번호: PCT/JP2010/062638
공개일: 03.02.2011 국제출원일: 27.07.2010
IPC:
H05K 1/02 (2006.01) ,H01L 23/12 (2006.01) ,H01L 23/36 (2006.01) ,H05K 7/20 (2006.01)
출원인: SHIMADU, Hitoshi[JP/JP]; JP (UsOnly)
KONDOU, Kazunori[JP/JP]; JP (UsOnly)
SAWADA, Takehiko[JP/JP]; JP (UsOnly)
HAYAKAWA, Takahiro[JP/JP]; JP (UsOnly)
ASAI, Tomoaki[JP/JP]; JP (UsOnly)
YAMAUCHI, Ryou[JP/JP]; JP (UsOnly)
KABUSHIKI KAISHA TOYOTA JIDOSHOKKI[JP/JP]; 2-1, Toyoda-cho, Kariya-shi, Aichi 4488671, JP (AllExceptUS)
발명자: SHIMADU, Hitoshi; JP
KONDOU, Kazunori; JP
SAWADA, Takehiko; JP
HAYAKAWA, Takahiro; JP
ASAI, Tomoaki; JP
YAMAUCHI, Ryou; JP
대리인: ONDA, Hironori; 12-1, Ohmiya-cho 2-chome, Gifu-shi, Gifu 5008731, JP
우선권 정보:
2009-17450527.07.2009JP
2009-17450627.07.2009JP
2009-27616504.12.2009JP
발명의 명칭: (EN) WIRING SUBSTRATE AND MANUFACTURING METHOD FOR WIRING SUBSTRATE
(FR) SUBSTRAT DE CÂBLAGE ET PROCÉDÉ DE FABRICATION DU SUBSTRAT DE CÂBLAGE
(JA) 配線基板および配線基板の製造方法
요약서: front page image
(EN) Disclosed is a wiring substrate that is provided with a wiring pattern formed from a metal plate, and an insulation layer as a base material to which the wiring pattern is to be fixed. The wiring pattern has a mounting pad for having electronic parts (11) surface-mounted. Electronic parts are mounted onto the surface of the wiring pattern, by pouring solder into the mounting pad of the wiring pattern.
(FR) La présente invention se rapporte à un substrat de câblage qui est pourvu d'un motif de câblage formé à partir d'une plaque métallique, et d'une couche d'isolation comme matériau de base à laquelle doit être fixé le motif de câblage. Le motif de câblage a une plage d'accueil pour supporter des pièces électroniques (11) montées sur la surface. Les pièces électroniques sont montées sur la surface du motif de câblage en coulant une soudure sur la plage d'accueil du motif de câblage.
(JA)  金属板から形成された配線パターンと、配線パターンが固定される基材としての絶縁層とを備える配線基板が開示される。配線パターンは、電子部品11を表面実装する実装パッドを有する。配線パターンの実装パッドに半田を流し込むことで電子部品を配線パターンの表面に実装する。
지정국: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IS, JP, KE, KG, KM, KN, KP, KR, KZ, LA, LC, LK, LR, LS, LT, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PE, PG, PH, PL, PT, RO, RS, RU, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, SD, SL, SZ, TZ, UG, ZM, ZW)
유라시아 특허청 (AM, AZ, BY, KG, KZ, MD, RU, TJ, TM)
유럽 특허청(EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, ML, MR, NE, SN, TD, TG)
공개언어: 일본어 (JA)
출원언어: 일본어 (JA)