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1. (WO2006017163) VERSATILE SEMI-TOROIDAL PROCESSING FURNACE WITH AUTOMATIC AND RECONFIGURABLE WAFER EXCHANGE
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CLAIMS
Having described my invention above, I claim:

1. An improved thermal processing system for a semiconductor wafer including:
a first portion configured in a semi-circular shape;
a second toroidal-shaped chamber portion comprising a purge cabinet for thermally processing wafers and volumetrically overlapping with said first portion at a first end, said purge cabinet being in gaseous contact with a gas source at second end;
a wafer delivery and retrieval system located in the interior of said first portion, including a rotation arm rotating around a central axis located in said first portion, said rotation arm mechanically connected to a connector, said connector of attaching itself to a paddle configured to hold a plurality of wafers for thermal processing in said chamber;
wherein said connector is capable of releasing said paddle inside said chamber and pulling said paddle out of said chamber.

2. The thermal processing system as recited in claim 1 , further comprising a thermal plug located at a back end of said paddle.

3. The thermal processing system as recited in claim 2, further comprising a scavenger door located at the back end of said thermal plug.

4. The thermal processing system as recited in claim 1 , wherein said purge cabinet is toroidal.

5. The thermal processing system as recited in claim 1 , wherein said purge cabinet is cubic.

6. The thermal processing system as recited in claim 1 , wherein said wafers are vertically held on the paddle in a radial configuration.

7. The thermal processing system as recited in claim 1 , wherein said system includes a vertical diffusion oven.

8. The thermal processing system as recited in claim 1 , wherein said wafers are held on the paddle horizontally in multiple stacks in an arc.

9. The thermal processing system as recited in claim 8, wherein said wafers in each stack are supported by a structure included in said paddle.

10. The thermal processing system as recited in claim 1, wherein said second portion is between 60 and 130 degrees of arc.

11. The thermal processing system as recited in claim 1 , wherein said first portion is between 120 and 200 degrees of arc.

12. The thermal processing system as recited in claim 1, wherein said first portion and said second portion volumetrically overlap each other between 5 and 20 degree of arc.

13. The thermal processing system as recited in claim 1 , further including a wafer loading system, said wafer loading system including a loading arm configured to move a single wafer from a carrier to a secure position on said paddle.

'14. The thermal processing system as recited in claim 13, wherein said loading arm can move at least 90 degrees in at least 2 different axes.

15. The thermal processing system as recited in claim 13, wherein said loading arm moves multiple wafers to a horizontal processing position on said paddle.

16. The thermal processing system as recited in claim 1 , wherein said loading arm is programmable.

17. The thermal processing system as recited in claim 16, wherein said high- temperature paddle material is silicon carbide.

18. The system as recited in claim 1 , wherein multiple said thermal processing systems are horizontally stacked on top of each other.

19. A method for processing a batch of workpieces comprising the acts of:

using a controllable robot arm to load wafers individually to a vertical position to at least one wafer holder located on a cantilever system;

rotating said cantilever system to place said at least one wafer holder in a thermal processing furnace;

thermally processing said batch of wafers;

rotating said cantilever system such that said at least one wafer holder out of said furnace;

placing said thermally processed wafers into a second position in an intermediate storage area; and

loading said thermally processed wafers back into said carrier.

20. The method as recited in claim 19, further comprising placing an SMIF in a vertical storage position prior to said loading step.

21. The method as recited in claim 20, further comprising opening the SMIF in an environmentally secure area with said robot arm prior to said loading step and after said placing step.

22. The method as recited in claim 19, further comprising placing a FOUP in a vertical storage position prior to said loading step.

23. The method as recited in claim 22, further comprising opening the FOUP in an environmentally secure area with an the step of prior to said loading step and after said placing

24. The method as recited in claim 19, wherein there are a plurality of wafer boats.

25. The method as recited in claim 24, wherein after said loading arm has filled up the first of said at least one of said plurality of wafer boats, said cantilever system rotates such that a second wafer boat may be loaded.

26. The method as recited in claim 19, wherein the motion of said
programmable robot arm include:
securing a wafer stored in the horizontal position;
moving said wafer towards the rear of said system;
rotating said wafer 90 degrees; and
moving said wafer by rotating said robot arm about its vertical axis.

27. The method as recited in claim 19, wherein the motion of said programmable robot arm includes: securing a wafer stored in the horizontal position;
moving said wafer clear of any objects;
rotating said wafer 90 degrees, such that said wafer is vertical;
moving said wafer by having said robot arm rotate about its z-axis; and moving said wafer into a secure position on said paddle.
28. The method as recited in claim 19, wherein said wafers are loaded into a wafer boat.
29. The method as recited in claim 19, wherein said wafers are loaded directly onto the paddle.

30.An improved thermal processing system for a semiconductor wafer including:
a first portion configured in a semi-circular shape;
a second toroidal-shaped chamber portion comprising a purge cabinet for thermally processing wafers and volumetrically overlapping with said first portion at a first end, said purge cabinet being in gaseous contact with a gas source at second end;
a wafer delivery and retrieval system located in the interior of said first portion, including a rotation arm rotating around a central axis located in said first portion, said rotation arm mechanically connected to a connector, said connector of attaching itself to a paddle;
wherein said connector is capable of releasing said paddle inside said chamber and pulling said paddle out of said chamber,
wherein said paddle is configured to hold a plurality of wafer boats.
31. The system as recited in claim 30, wherein said paddle is configured to hold specially configured wafer boats, such that said wafer boats hold said wafers in a radial configuration.
32. The system as recited in claim 30, where said paddle is configured to hold wafer boats, said wafer boats configured to hold wafers in the horizontal position during thermal processing.

33. The method as recited in claim 19, wherein said processing takes place at low pressure (LPCVD).

34. A method for processing at least two batches of semiconductor wafers in a single unit containing at least two thermal processing units comprising: using a robot arm to load a first batch of wafers individually to a first vertical position on a first wafer holder located on a first cantilever system;
rotating said first cantilever system to place said at least one first wafer holder in a first thermal processing oven;
thermally processing said first batch of wafers;
during such time that said first batch of wafers is processing, performing the following acts:
using said programmed robot arm to load a second batch of wafers individually to a second vertical position on a second wafer holder located on a second cantilever system;
rotating said second cantilever system to place said at second wafer holder in a thermal processing oven; and
thermally processing said second batch of wafers;
and during such time that said second batch of wafers is being thermally processed:
rotating said first cantilever system such that said at least one wafer holder is rotated out of said first thermal processing oven; and
placing said first set of thermally processed wafers into a second
position in an intermediate storage area.

35. A method for processing at least two batches of semiconductor wafers in a single unit containing at least two thermal processing units comprising the acts of:
determining whether a first batch is to be processed vertically or horizontally; using a robot arm to load a first batch of wafers individually to a first position on a first wafer holder located on a first cantilever system;

rotating said first cantilever system to place said at least one wafer holder in a first thermal processing oven;
thermally processing said first batch of wafers;
determining whether a second batch of wafers is to be processed vertically or horizontally;
during such time that said first batch of wafers is processing, performing the following acts:
using said programmed robot arm to load a second batch of wafers
individually to a second position on a second wafer holder located on a second cantilever system;
rotating said second cantilever system to place said second wafer holder in a purged thermal processing oven;
thermally processing said second batch of wafers;
and during such time that said second batch of wafers is being thermally processed:
rotating said first cantilever system such that said first wafer holder is rotated out of said first thermal processing oven; and
placing said first set of thermally processed wafers into a second
position into an intermediate storage area.

36. The method as recited in claim 35, wherein said first batch is processed horizontally.
37. The method as recited in claim 35, wherein said first batch is processed vertically.
38. The method as recited in claim 35, wherein said second batch is processed horizontally.
39. The method as recited in claim 35, wherein said second batch is processed vertically.
40. The method as recited in claim 34, further including the step of loading a third batch of wafers into a third furnace.

41. The method as recited in claim 35, further including the step of loading a third batch of wafers into a third furnace.

42. An automated thermal semiconductor processing system including:
an automatic loading system, including vertical wafer storage, a robot arm capable of moving about its own axis in at least two planes, and a horizontal storage area; and
a thermal processor including a cantilever loading arm, attached to a support arm and a shaft platform, configured to rotate horizontally in both directions and to raise or lower a wafer holding structure into and out of a processing oven,
wherein said robot arm is configured to move wafers directly onto said wafer holding structure.

43. The thermal semiconductor processing system as recited in claim 42, further comprising an effluent exhaust flow.

44. The thermal semiconductor processing system as recited in claim 43, wherein said exhaust flow is at least partially formed by said rotation space and said purge cabinet.

45. An semiconductor processing furnace wherein the improvement includes using a robot arm capable of multiple-degrees of motion, operatively coupled with a controller that can load said stored wafers onto a plurality of vertical levels, wherein each of said vertical levels included a separate thermal processing furnace fed by a cantilever assembly, wherein each of said thermal processing systems is configured in the shape of a semi-toroid.