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1. WO2022079759 - 半導体モジュール

公開番号 WO/2022/079759
公開日 21.04.2022
国際出願番号 PCT/JP2020/038472
国際出願日 12.10.2020
IPC
H01L 23/29 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
29材料に特徴のあるもの
H01L 23/48 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
48動作中の固体本体からまたは固体本体へ電流を導く装置,例.リードまたは端子装置
H01L 25/07 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
04個別の容器を持たない装置
07装置がグループH01L29/00に分類された型からなるもの
H01L 25/18 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
CPC
H01L 2224/0603
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
0601Structure
0603Bonding areas having different sizes, e.g. different heights or widths
H01L 2224/40137
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
39Structure, shape, material or disposition of the strap connectors after the connecting process
40of an individual strap connector
401Disposition
40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
40137the bodies being arranged next to each other, e.g. on a common substrate
H01L 2224/40245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
39Structure, shape, material or disposition of the strap connectors after the connecting process
40of an individual strap connector
401Disposition
40151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
40221the body and the item being stacked
40245the item being metallic
H01L 2224/48247
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48245the item being metallic
48247connecting the wire to a bond pad of the item
H01L 2224/73221
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73201on the same surface
73221Strap and wire connectors
H01L 23/29
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
29characterised by the material ; , e.g. carbon
出願人
  • 三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP]/[JP]
発明者
  • 竹内 謙介 TAKEUCHI Kensuke
代理人
  • 弁理士法人ぱるも特許事務所 PALMO PATENT FIRM, P.C.
優先権情報
公開言語 (言語コード) 日本語 (ja)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR MODULE
(FR) MODULE SEMI-CONDUCTEUR
(JA) 半導体モジュール
要約
(EN) This semiconductor module is provided with: a base plate (50) which is in the form of a plate; a terminal member (80); an electronic component which is bonded to one surface of the base plate (50); and a molding resin (70) which seals the base plate (50), the terminal member (80) and the electronic component. The base plate (50) and the terminal member (80) are conductive members that are arranged on a same plane at a distance from each other; each of the base plate (50) and the terminal member (80) has a main body part and a terminal part that is exposed to the outside from the molding resin (70). The main body part (52) of the base plate (50) is provided with a through hole (60) in an extended portion (53) that extends toward the terminal part (51) and is connected to the terminal part (51).
(FR) L'invention concerne un module à semi-conducteur comprenant : une plaque de base (50) qui se présente sous la forme d'une plaque; un élément de borne (80); un composant électronique qui est lié à une surface de la plaque de base (50); et une résine de moulage (70) qui scelle la plaque de base (50), l'élément de borne (80) et le composant électronique. La plaque de base (50) et l'élément de borne (80) sont des éléments conducteurs qui sont disposés sur un même plan à une certaine distance l'un de l'autre; chacune de la plaque de base (50) et l'élément de borne (80) a une partie de corps principal et une partie de borne qui est exposée à l'extérieur à partir de la résine de moulage (70). La partie de corps principal (52) de la plaque de base (50) comporte un trou traversant (60) dans une partie étendue (53) qui s'étend vers la partie de borne (51) et est reliée à la partie de borne (51).
(JA) 板状に形成されたベースプレート(50)と、端子部材(80)と、ベースプレート(50)の一方の面に接合された電子部品と、ベースプレート(50)、端子部材(80)、及び電子部品を封止するモールド樹脂(70)とを備え、ベースプレート(50)、及び端子部材(80)は、導電性部材であり、同一平面上に隙間を空けて並べられ、ベースプレート(50)、及び端子部材(80)のそれぞれは、本体部と、モールド樹脂(70)から外部に露出した端子部とを有しており、ベースプレート(50)は、本体部(52)において、端子部(51)に向かって延出し、端子部(51)に接続される部分である延出部分(53)に貫通孔(60)を備えている。
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