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1. WO2020262533 - 電子装置および電子装置の実装構造

公開番号 WO/2020/262533
公開日 30.12.2020
国際出願番号 PCT/JP2020/025022
国際出願日 25.06.2020
IPC
H01L 23/28 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
H01L 23/50 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
48動作中の固体本体からまたは固体本体へ電流を導く装置,例.リードまたは端子装置
50集積回路装置用
H05K 1/18 2006.1
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
1印刷回路
18印刷によらない電気部品と構造的に結合した印刷回路
CPC
H01L 2224/32245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32245the item being metallic
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 2224/48137
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
48137the bodies being arranged next to each other, e.g. on a common substrate
H01L 2224/48247
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48245the item being metallic
48247connecting the wire to a bond pad of the item
H01L 2224/49113
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
49of a plurality of wire connectors
491Disposition
4911the connectors being bonded to at least one common bonding area, e.g. daisy chain
49113the connectors connecting different bonding areas on the semiconductor or solid-state body to a common bonding area outside the body, e.g. converging wires
H01L 2224/73265
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73251on different surfaces
73265Layer and wire connectors
出願人
  • ローム株式会社 ROHM CO., LTD. [JP]/[JP]
発明者
  • 土山 寿朗 TSUCHIYAMA Toshiro
  • 糟谷 泰正 KASUYA Yasumasa
  • 山崎 達生 YAMAZAKI Tatsuo
代理人
  • 臼井 尚 USUI Takashi
  • 鈴木 泰光 SUZUKI Yasumitsu
優先権情報
2019-12133928.06.2019JP
公開言語 (言語コード) 日本語 (ja)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) ELECTRONIC DEVICE AND ELECTRONIC DEVICE MOUNTING STRUCTURE
(FR) DISPOSITIF ÉLECTRONIQUE ET STRUCTURE DE MONTAGE DE DISPOSITIF ÉLECTRONIQUE
(JA) 電子装置および電子装置の実装構造
要約
(EN) This electronic device is provided with: an electronic element that has an element main surface and an element rear surface separate from each other in a first direction and that has a main surface electrode disposed on the element main surface; a resin member that has a resin rear surface oriented in the same direction as that of the element rear surface and that covers the electronic element; and an electrically conductive member that supports the electronic element and that is electrically conductive to the electronic element. The electrically conductive member has a first exposed surface, a second exposed surface, and a third exposed surface each of which is exposed from the resin rear surface. The resin member further has a first resin side surface and a second resin side surface each of which is raised from the resin rear surface and which are connected to each other. When viewed in the first direction, the first exposed surface is provided to a corner part at which the first resin side surface and the second resin side surface are connected to each other. When viewed in the first direction, the second exposed surface is aligned with the first exposed surface in a second direction along the first resin side surface. In the second direction, the third exposed surface is located between the first exposed surface and the second exposed surface. When viewed in the first direction, the area of the third exposed surface is greater than the area of each of the first exposed surface and the second exposed surface.
(FR) La présente invention concerne un dispositif électronique qui est pourvu : d'un élément électronique qui comporte une surface principale d'élément et une surface arrière d'élément séparées l'une de l'autre dans une première direction et qui comporte une électrode de surface principale disposée sur la surface principale d'élément ; d'un élément en résine qui comporte une surface arrière de résine orientée dans la même direction que celle de la surface arrière d'élément et qui recouvre l'élément électronique ; et d'un élément électroconducteur qui supporte l'élément électronique et qui est électroconducteur de l'élément électronique. L'élément électroconducteur comporte une première surface exposée, une deuxième surface exposée et une troisième surface exposée, chacune étant exposée à partir de la surface arrière de résine. L'élément en résine comporte en outre une première surface latérale de résine et une seconde surface latérale de résine qui sont chacune surélevées par rapport à la surface arrière de résine et qui sont reliées l'une à l'autre. Lorsqu'elle est vue dans la première direction, la première surface exposée est disposée sur une partie d'angle au niveau de laquelle la première surface latérale de résine et la seconde surface latérale de résine sont reliées l'une à l'autre. Lorsqu'elle est vue dans la première direction, la deuxième surface exposée est alignée sur la première surface exposée dans une seconde direction le long de la première surface latérale de résine. Dans la seconde direction, la troisième surface exposée est située entre la première surface exposée et la deuxième surface exposée. Lorsqu'elle est vue dans la première direction, l'aire de la troisième surface exposée est plus grande que l'aire de chacune de la première surface exposée et de la deuxième surface exposée.
(JA) 電子装置は、第1方向において離間する素子主面および素子裏面を有し、前記素子主面に主面電極が配置された電子素子と、前記素子裏面と同じ方向を向く樹脂裏面を有し、前記電子素子を覆う樹脂部材と、前記電子素子を支持し、かつ、前記電子素子に導通する導電部材と、を備える。前記導電部材は、各々が前記樹脂裏面から露出する第1露出面、第2露出面および第3露出面を有する。前記樹脂部材は、各々が前記樹脂裏面から起立し、かつ、互いに繋がる第1樹脂側面および第2樹脂側面をさらに有する。前記第1露出面は、前記第1方向に見て、前記第1樹脂側面と前記第2樹脂側面とが繋がる角部に配置されている。前記第2露出面は、前記第1方向に見て、前記第1樹脂側面に沿う第2方向において、前記第1露出面と並んでいる。前記第3露出面は、前記第2方向において、前記第1露出面と前記第2露出面との間に位置している。前記第1方向に見て、前記第3露出面の面積は、前記第1露出面および前記第2露出面の各面積よりも大きい。
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