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1. WO2020246456 - 半導体装置および電力変換装置

公開番号 WO/2020/246456
公開日 10.12.2020
国際出願番号 PCT/JP2020/021725
国際出願日 02.06.2020
IPC
H01L 23/12 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
12マウント,例.分離できない絶縁基板
H01L 23/29 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
29材料に特徴のあるもの
H01L 23/50 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
48動作中の固体本体からまたは固体本体へ電流を導く装置,例.リードまたは端子装置
50集積回路装置用
H01L 21/56 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
50サブグループH01L21/06~H01L21/326の一つに分類されない方法または装置を用いる半導体装置の組立
56封緘,例.封緘層,被覆
CPC
H01L 21/56
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
H01L 2224/32245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32245the item being metallic
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 2224/48247
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48245the item being metallic
48247connecting the wire to a bond pad of the item
H01L 2224/73265
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73251on different surfaces
73265Layer and wire connectors
H01L 23/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
出願人
  • 三菱電機株式会社 MITSUBISHI ELECTRIC CORPORATION [JP]/[JP]
発明者
  • 寺田 隼人 TERADA, Hayato
  • 中島 泰 NAKAJIMA, Dai
  • 田中 繁之 TANAKA, Shigeyuki
  • 中村 宏之 NAKAMURA, Hiroyuki
  • 坂元 創一 SAKAMOTO, Soichi
  • 藤野 純司 FUJINO, Junji
代理人
  • 特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.
優先権情報
2019-10372403.06.2019JP
公開言語 (言語コード) 日本語 (ja)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE AND POWER CONVERSION DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEURS ET DISPOSITIF DE CONVERSION DE COURANT
(JA) 半導体装置および電力変換装置
要約
(EN) Provided is a semiconductor device having improved reliability by suppressing peeling of a sealing member from a heat sink and suppressing deterioration of heat dissipation characteristics. The semiconductor device (1) comprises: a heat sink (100) having a side surface; a semiconductor element; and a sealing member (10). The semiconductor element is thermally connected to the heat sink (100). The semiconductor element is disposed on the heat sink (100). The sealing member (10) seals the semiconductor element and the heat sink (100). The sealing member (10) is in contact with the side surface of the heat sink (100). The side surface of the heat sink (100) includes a concave part (113) and a convex part (112). The concave part (113) and the convex part (112) extend along the thickness direction of the heat sink (100).
(FR) L'invention concerne un dispositif à semi-conducteur ayant une fiabilité améliorée en supprimant le pelage d'un élément d'étanchéité à partir d'un dissipateur thermique et en supprimant la détérioration des caractéristiques de dissipation de chaleur. Le dispositif à semi-conducteur (1) comprend : un dissipateur thermique (100) ayant une surface latérale ; un élément semi-conducteur ; et un élément d'étanchéité (10). L'élément semi-conducteur est thermiquement connecté au dissipateur thermique (100). L'élément semi-conducteur est disposé sur le dissipateur thermique (100). L'élément d'étanchéité (10) scelle l'élément semi-conducteur et le dissipateur thermique (100). L'élément d'étanchéité (10) est en contact avec la surface latérale du dissipateur thermique (100). La surface latérale du dissipateur thermique (100) comprend une partie concave (113) et une partie convexe (112). La partie concave (113) et la partie convexe (112) s'étendent le long de la direction d'épaisseur du dissipateur thermique (100).
(JA) ヒートシンクからの封止部材の剥離を抑制するとともに、放熱特性の劣化を抑制することで、信頼性が向上した半導体装置を提供する。半導体装置(1)は、側面を有するヒートシンク(100)と、半導体素子と、封止部材(10)とを備える。半導体素子は、ヒートシンク(100)と熱的に接続される。半導体素子はヒートシンク(100)上に配置される。封止部材(10)は、半導体素子とヒートシンク(100)とを封止する。封止部材(10)は、ヒートシンク(100)の側面に接触する。ヒートシンク(100)の側面は、凹形状部(113)および凸形状部(112)を含む。凹形状部(113)および凸形状部(112)は、それぞれヒートシンク(100)の厚み方向に沿って延びる。
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