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出願の表示

1. WO2020241239 - 半導体装置

公開番号 WO/2020/241239
公開日 03.12.2020
国際出願番号 PCT/JP2020/018954
国際出願日 12.05.2020
IPC
H01L 23/12 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
12マウント,例.分離できない絶縁基板
H01L 23/28 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
H01L 23/48 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
48動作中の固体本体からまたは固体本体へ電流を導く装置,例.リードまたは端子装置
H01L 25/07 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
04個別の容器を持たない装置
07装置がグループH01L29/00に分類された型からなるもの
H01L 25/18 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
H01L 21/52 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
50サブグループH01L21/06~H01L21/326の一つに分類されない方法または装置を用いる半導体装置の組立
52容器中への半導体本体のマウント
CPC
H01L 2224/0603
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
0601Structure
0603Bonding areas having different sizes, e.g. different heights or widths
H01L 2224/06181
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
061Disposition
0618being disposed on at least two different sides of the body, e.g. dual array
06181On opposite sides of the body
H01L 2224/29101
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
28Structure, shape, material or disposition of the layer connectors prior to the connecting process
29of an individual layer connector
29001Core members of the layer connector
29099Material
291with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
29101the principal constituent melting at a temperature of less than 400°C
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/45124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
44Structure, shape, material or disposition of the wire connectors prior to the connecting process
45of an individual wire connector
45001Core members of the connector
45099Material
451with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
45117the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
45124Aluminium (Al) as principal constituent
H01L 2224/45144
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
44Structure, shape, material or disposition of the wire connectors prior to the connecting process
45of an individual wire connector
45001Core members of the connector
45099Material
451with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
45138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
45144Gold (Au) as principal constituent
出願人
  • ローム株式会社 ROHM CO., LTD. [JP]/[JP]
発明者
  • 木村 明寛 KIMURA Akihiro
  • 井上 開人 INOUE Kaito
代理人
  • 臼井 尚 USUI Takashi
  • 鈴木 泰光 SUZUKI Yasumitsu
優先権情報
2019-10035229.05.2019JP
公開言語 (言語コード) 日本語 (ja)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置
要約
(EN) A semiconductor device A1 according to the present disclosure comprises: a support member 2; a metal member 30 which has a main surface 301 and a rear surface 302 separated from each other in a Z direction and the rear surface 302 facing the support member 2 and joined to the support member 30; a second joining layer 42 that joins the support member 2 and the metal member 30; a semiconductor element 10 that faces the main surface 301 and is joined to the metal member 30; and a sealing member 7 that covers the support member 2, the metal member 30, the second joining layer 42, and the semiconductor element 10. The metal member 30 is a porous body having a plurality of pores 31 formed therein. A semiconductor device having improved reliability by relaxing the thermal stress that occurs during heat generation in a semiconductor element can be provided.
(FR) Un dispositif à semi-conducteur A1 selon la présente invention comprend : un élément de support 2 ; un élément métallique 30 qui a une surface principale 301 et une surface arrière 302 séparées l'une de l'autre dans une direction Z et la surface arrière 302 faisant face à l'élément de support 2 et reliée à l'élément de support 30 ; une seconde couche de jonction 42 qui relie l'élément de support 2 et l'élément métallique 30 ; un élément semi-conducteur 10 qui fait face à la surface principale 301 et qui est relié à l'élément métallique 30 ; et un élément d'étanchéité 7 qui recouvre l'élément de support 2, l'élément métallique 30, la seconde couche de jonction 42 et l'élément semi-conducteur 10. L'élément métallique 30 est un corps poreux ayant une pluralité de pores 31 formés à l'intérieur de celui-ci. Un dispositif à semi-conducteur ayant une fiabilité améliorée par relaxation de la contrainte thermique qui se produit pendant la génération de chaleur dans un élément semi-conducteur peut être fourni.
(JA) 本開示の半導体装置A1は、支持部材2と、z方向において離間した主面301および裏面302を有し、裏面302が支持部材2に対向して、支持部材2に接合された金属部材30と、支持部材2と金属部材30とを接合する第2接合層42と、主面301に対向し、金属部材30に接合された半導体素子10と、支持部材2、金属部材30、第2接合層42および半導体素子10を覆う封止部材7と、を備えている。金属部材30は、複数の細孔31が形成された多孔質体である。半導体素子の発熱時の熱応力を緩和することにより、信頼性の向上を図った半導体装置を提供できる。
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