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1. WO2020071185 - 半導体装置および半導体装置の製造方法

公開番号 WO/2020/071185
公開日 09.04.2020
国際出願番号 PCT/JP2019/037446
国際出願日 25.09.2019
IPC
H01L 25/07 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
04個別の容器を持たない装置
07装置がグループH01L29/00に分類された型からなるもの
H01L 23/36 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
34冷却,加熱,換気または温度補償用装置
36冷却または加熱を容易にするための材料の選択または成形,例.ヒート・シンク
H01L 25/18 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
CPC
H01L 2224/0603
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
0601Structure
0603Bonding areas having different sizes, e.g. different heights or widths
H01L 2224/06181
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
061Disposition
0618being disposed on at least two different sides of the body, e.g. dual array
06181On opposite sides of the body
H01L 2224/40
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
39Structure, shape, material or disposition of the strap connectors after the connecting process
40of an individual strap connector
H01L 2224/73221
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73201on the same surface
73221Strap and wire connectors
H01L 2224/84214
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
84using a strap connector
842Applying energy for connecting
8421with energy being in the form of electromagnetic radiation
84214using a laser
H01L 23/36
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation ; ; Temperature sensing arrangements
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
出願人
  • ローム株式会社 ROHM CO., LTD. [JP]/[JP]
発明者
  • 畑野 舞子 HATANO Maiko
代理人
  • 吉田 稔 YOSHIDA Minoru
  • 臼井 尚 USUI Takashi
優先権情報
2018-18752802.10.2018JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置および半導体装置の製造方法
要約
(EN)
A semiconductor device A1 of the present disclosure is provided with: a semiconductor element 10A which has an element major surface 101 and an element back surface 102, the element major surface 101 having a major surface electrode 11 formed thereon and the element back surface 102 having a back surface electrode 12 formed thereon; an electrically conductive substrate 22A which has a major surface 221A opposing the element back surface 102 and with which the back surface electrode 12 is conductively connected; an electrically conductive substrate 22B which includes a major surface 221B and is disposed at a distance from the electrically conductive substrate 22A in a width direction x; and a lead member 51 which extends in the width direction x and conductively connects the major surface electrode 11 and the electrically conductive substrate 22B. The lead member 51 is disposed more toward a direction in which the major surface 221B faces than the major surface 221B, and is joined to the main surface electrode 11 via a lead junction layer 32. The electrically conductive substrate 22A, the semiconductor element 10A, and the lead junction layer 32, when viewed in the width direction x, overlap the electrically conductive substrate 22B. With such configuration, it is possible to suppress a decrease in reliability.
(FR)
Un dispositif à semi-conducteur A1 de la présente invention comprend : un élément semi-conducteur 10A qui a une surface principale d'élément 101 et une surface arrière d'élément 102, la surface principale d'élément 101 ayant une électrode de surface principale 11 formée sur celle-ci et la surface arrière d'élément 102 ayant une électrode de surface arrière 12 formée sur celle-ci; un substrat électriquement conducteur 22A qui a une surface principale 221A opposée à la surface arrière d'élément 102 et avec laquelle l'électrode de surface arrière 12 est connectée de manière conductrice; un substrat électriquement conducteur 22B qui comprend une surface principale 221B et qui est disposé à une certaine distance du substrat électriquement conducteur 22A dans une direction de largeur x; et un élément conducteur 51 qui s'étend dans la direction de la largeur x et se connecte de manière conductrice à l'électrode de surface principale 11 et le substrat électriquement conducteur 22B. L'élément conducteur 51 est disposé plus vers une direction dans laquelle la surface principale 221B est tournée vers la surface principale 221B, et est jointe à l'électrode de surface principale 11 par l'intermédiaire d'une couche de jonction de conducteur 32. Le substrat électriquement conducteur 22A, l'élément semi-conducteur 10A et la couche de jonction de conducteur 32, vus dans la direction de la largeur x, chevauchent le substrat électriquement conducteur 22B. Avec une telle configuration, il est possible de supprimer une diminution de fiabilité.
(JA)
本開示の半導体装置A1は、素子主面101および素子裏面102を有しており、素子主面101に主面電極11および素子裏面102に裏面電極12が形成された半導体素子10Aと、素子裏面102に対向する主面221Aを有しており、裏面電極12が導通接合された導電性基板22Aと、主面221Bを有しており、幅方向xにおいて導電性基板22Aと離間して配置された導電性基板22Bと、幅方向xに延びており、主面電極11と導電性基板22Bとを導通接続するリード部材51と、を備えている。リード部材51は、主面221Bよりも主面221Bが向く方向に配置され、かつ、リード接合層32を介して主面電極11に接合されている。導電性基板22A、半導体素子10A、および、リード接合層32は、幅方向xに見て、導電性基板22Bに重なる。このような構成により、信頼性が低下することを抑制することができる。
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