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1. WO2015025628 - 半導体装置の製造方法

公開番号 WO/2015/025628
公開日 26.02.2015
国際出願番号 PCT/JP2014/068134
国際出願日 08.07.2014
IPC
H01L 21/265 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
18不純物,例.ドーピング材料,を含むまたは含まない周期表第IV族の元素またはA↓I↓I↓IB↓V化合物から成る半導体本体を有する装置
26波または粒子の輻射線の照射
263高エネルギーの輻射線を有するもの
265イオン注入法
H01L 21/683 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
67製造または処理中の半導体または電気的固体装置の取扱いに特に適用される装置;半導体または電気的固体装置もしくは構成部品の製造または処理中のウエハの取扱いに特に適用される装置
683支持または把持のためのもの
CPC
H01L 21/02529
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02365Forming inorganic semiconducting materials on a substrate
02518Deposited layers
02521Materials
02524Group 14 semiconducting materials
02529Silicon carbide
H01L 21/0415
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0405the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
041Making n- or p-doped regions
0415using ion implantation
H01L 21/046
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0445the devices having semiconductor bodies comprising crystalline silicon carbide
0455Making n or p doped regions or layers, e.g. using diffusion
046using ion implantation
H01L 21/2253
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; ; Interactions between two or more impurities; Redistribution of impurities
225using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
2251Diffusion into or out of group IV semiconductors
2252using predeposition of impurities into the semiconductor surface, e.g. from a gaseous phase
2253by ion implantation
H01L 21/265
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26Bombardment with radiation
263with high-energy radiation
265producing ion implantation
H01L 21/26546
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26Bombardment with radiation
263with high-energy radiation
265producing ion implantation
2654in AIIIBV compounds
26546of electrically active species
出願人
  • 住友電気工業株式会社 SUMITOMO ELECTRIC INDUSTRIES, LTD. [JP/JP]; 大阪府大阪市中央区北浜四丁目5番33号 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
発明者
  • 久保田 良輔 KUBOTA, Ryosuke; JP
  • 田中 聡 TANAKA, So; JP
代理人
  • 特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.; 大阪府大阪市北区中之島二丁目2番7号 中之島セントラルタワー Nakanoshima Central Tower, 2-7, Nakanoshima 2-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
優先権情報
2013-17123921.08.2013JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE MANUFACTURING METHOD
(FR) PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR
(JA) 半導体装置の製造方法
要約
(EN)
According to the present invention, this semiconductor device manufacturing method is provided with: a step for preparing a semiconductor substrate; a step for placing the semiconductor substrate on an electrostatic chuck; a step for chucking the semiconductor substrate after increasing the temperature of the electrostatic chuck to a first temperature; a step for increasing the temperature of the electrostatic chuck to a second temperature in a state wherein the semiconductor substrate is being chucked, said second temperature being higher than the first temperature; and a step for processing the semiconductor substrate in a state wherein the temperature of the electrostatic chuck is increased to the second temperature.
(FR)
L'invention concerne un procédé de fabrication de dispositif à semi-conducteur qui comprend : une étape consistant à préparer un substrat semi-conducteur ; une étape consistant à placer le substrat semi-conducteur sur un mandrin électrostatique ; une étape consistant à maintenir le substrat semi-conducteur après augmentation de la température du mandrin électrostatique à une première température ; une étape consistant à augmenter la température du mandrin électrostatique à une seconde température dans un état dans lequel est maintenu le substrat semi-conducteur, ladite seconde température étant plus élevée que la première température ; et une étape consistant à traiter le substrat semi-conducteur dans un état dans lequel la température du mandrin électrostatique est augmentée de sorte à atteindre la seconde température.
(JA)
 この発明に従った半導体装置の製造方法は、半導体基板を準備する工程と、静電チャック上に半導体基板を載置する工程と、静電チャックを第1の温度に昇温した後、半導体基板をチャッキングする工程と、半導体基板をチャッキングした状態で、静電チャックを上記第1の温度より高い第2の温度に昇温する工程と、静電チャックを上記第2の温度に昇温した状態で、半導体基板に対する処理を実行する工程とを備える。
他の公開
DE1120140038385
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