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1. WO2015019770 - 電子デバイス封止用樹脂シート及び電子デバイスパッケージの製造方法

公開番号 WO/2015/019770
公開日 12.02.2015
国際出願番号 PCT/JP2014/067923
国際出願日 04.07.2014
IPC
H01L 23/373 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
34冷却,加熱,換気または温度補償用装置
36冷却または加熱を容易にするための材料の選択または成形,例.ヒート・シンク
373装置用材料の選択により容易になる冷却
H01L 23/29 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
29材料に特徴のあるもの
H01L 23/31 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
31配列に特徴のあるもの
CPC
B81B 7/0019
BPERFORMING OPERATIONS; TRANSPORTING
81MICROSTRUCTURAL TECHNOLOGY
BMICROSTRUCTURAL DEVICES OR SYSTEMS, e.g. MICROMECHANICAL DEVICES
7Microstructural systems; ; Auxiliary parts of microstructural devices or systems
0009Structural features, others than packages, for protecting a device against environmental influences
0019Protection against thermal alteration or destruction
B81C 1/00817
BPERFORMING OPERATIONS; TRANSPORTING
81MICROSTRUCTURAL TECHNOLOGY
CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
1Manufacture or treatment of devices or systems in or on a substrate
00777Preserve existing structures from alteration, e.g. temporary protection during manufacturing
00817Avoid thermal destruction
H01L 21/56
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
H01L 21/568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
568Temporary substrate used as encapsulation process aid
H01L 2223/54486
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2223Details relating to semiconductor or other solid state devices covered by the group H01L23/00
544Marks applied to semiconductor devices or parts
54473for use after dicing
54486Located on package parts, e.g. encapsulation, leads, package substrate
H01L 2224/12105
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
出願人
  • 日東電工株式会社 NITTO DENKO CORPORATION [JP/JP]; 大阪府茨木市下穂積1丁目1番2号 1-1-2,Shimohozumi,Ibaraki-shi, Osaka 5678680, JP
発明者
  • 千歳 裕之 SENZAI, Hiroyuki; JP
  • 豊田 英志 TOYODA, Eiji; JP
  • 清水 祐作 SHIMIZU, Yusaku; JP
代理人
  • 特許業務法人 ユニアス国際特許事務所 UNIUS PATENT ATTORNEYS OFFICE; JP
優先権情報
2013-16705809.08.2013JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) RESIN SHEET FOR SEALING ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING ELECTRONIC DEVICE PACKAGE
(FR) FEUILLE DE RÉSINE DESTINÉE À SCELLER UN DISPOSITIF ÉLECTRONIQUE ET PROCÉDÉ PERMETTANT DE FABRIQUER UN BOÎTIER DE DISPOSITIF ÉLECTRONIQUE
(JA) 電子デバイス封止用樹脂シート及び電子デバイスパッケージの製造方法
要約
(EN)
Provided are a resin sheet for sealing an electronic device, in which the sheet is capable of suppressing temperature increases in an electronic device that are caused by radiant heat, and a method for manufacturing an electronic device package. The present invention relates to resin sheet for sealing an electronic device, in which the sheet is provided with a heat reflection layer and a resin layer.
(FR)
L'invention porte sur une feuille de résine destinée à sceller un dispositif électronique, la feuille pouvant supprimer les augmentations de température dans un dispositif électronique qui sont provoquées par la chaleur radiante. L'invention porte également sur un procédé permettant de fabriquer un boîtier de dispositif électronique. La présente invention se rapporte à une feuille de résine destinée à sceller un dispositif électronique, la feuille comprenant une couche de réflexion de chaleur et une couche de résine.
(JA)
 輻射熱による電子デバイスの温度上昇を抑制できる電子デバイス封止用樹脂シート及び電子デバイスパッケージの製造方法を提供する。 熱反射層及び樹脂層を備える電子デバイス封止用樹脂シートに関する。
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