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1. WO2015019732 - 炭化珪素半導体装置およびその製造方法

公開番号 WO/2015/019732
公開日 12.02.2015
国際出願番号 PCT/JP2014/066820
国際出願日 25.06.2014
IPC
H01L 29/78 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
66半導体装置の型
68整流,増幅またはスイッチされる電流を流さない電極に電流のみまたは電位のみを与えることにより制御できるもの
76ユニポーラ装置
772電界効果トランジスタ
78絶縁ゲートによって生じる電界効果を有するもの
H01L 29/12 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
02半導体本体
12構成材料に特徴のあるもの
CPC
H01L 21/02164
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
02164the material being a silicon oxide, e.g. SiO2
H01L 21/02236
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
02227formation by a process other than a deposition process
0223formation by oxidation, e.g. oxidation of the substrate
02233of the semiconductor substrate or a semiconductor layer
02236group IV semiconductor
H01L 21/02255
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
02227formation by a process other than a deposition process
02255formation by thermal treatment
H01L 29/0696
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0684characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
0692Surface layout
0696of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
H01L 29/086
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0856Source regions
086Impurity concentration or distribution
H01L 29/0865
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0856Source regions
0865Disposition
出願人
  • 住友電気工業株式会社 SUMITOMO ELECTRIC INDUSTRIES, LTD. [JP/JP]; 大阪府大阪市中央区北浜四丁目5番33号 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
発明者
  • 日吉 透 HIYOSHI, Toru; JP
  • 和田 圭司 WADA, Keiji; JP
代理人
  • 特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.; 大阪府大阪市北区中之島二丁目2番7号 中之島セントラルタワー Nakanoshima Central Tower, 2-7, Nakanoshima 2-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
優先権情報
2013-16334306.08.2013JP
2013-20652501.10.2013JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SILICON CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR SAME
(FR) DISPOSITIF À SEMI-CONDUCTEUR AU CARBURE DE SILICIUM ET SON PROCÉDÉ DE FABRICATION
(JA) 炭化珪素半導体装置およびその製造方法
要約
(EN)
A silicon carbide semiconductor device (1) is provided with a silicon carbide substrate (10) and a gate electrode (27). The silicon carbide substrate (10) includes a first source region (14a), a second source region (14b), a first body region (13a), a second body region (13b), a first drift region (17a), a second drift region (17b), a third drift region (17c), and a first connection region (22a). The first connection region (22a) is of a second conductivity type and is disposed so that, when a point of intersection between a line along a first linear section (L1) and a line along a second linear section (L2) is treated as a first point of intersection (13a1), and a point of intersection between a line along a third linear section (L3) and a line along a fourth linear section (L4) is treated as a second point of intersection (13b1), the first point of intersection (13a1) and the second point of intersection (13b1) are included therein. This allows for the provision of a silicon carbide semiconductor device, as well as a manufacturing method for the same, for which switching characteristics can be improved.
(FR)
L'invention concerne un dispositif à semi-conducteur (1) au carbure de silicium doté d'un substrat au carbure de silicium (10) et d'une électrode de grille (27). Le substrat au carbure de silicium (10) comprend une première région de source (14a), une seconde région de source (14b), une première région de corps (13a), une seconde région de corps (13b), une première région de dérive (17a), une deuxième région de dérive (17b), une troisième région de dérive (17c) et une première région de connexion (22a). La première région de connexion (22a) a un second type de conductivité et est disposée de sorte que, lorsque l'on traite un point d'intersection situé entre une ligne longeant une première section rectiligne (L1) et une ligne longeant une deuxième section rectiligne (L2) en tant que premier point d'intersection (13a1) et que l'on traite un point d'intersection situé entre une ligne longeant une troisième section rectiligne (L3) et une ligne longeant une quatrième section rectiligne (L4) en tant que second point d'intersection (13b1), le premier point d'intersection (13a1) et le second point d'intersection (13b1) y soient inclus. Ceci permet d'obtenir un dispositif à semi-conducteur au carbure de silicium, de même que son procédé de fabrication, pour lequel on peut améliorer les caractéristiques de commutation.
(JA)
 炭化珪素半導体装置(1)は、炭化珪素基板(10)と、ゲート電極(27)とを備えている。炭化珪素基板(10)は、第1のソース領域(14a)および第2のソース領域(14b)と、第1のボディ領域(13a)と、第2のボディ領域(13b)と、第1のドリフト領域(17a)と、第2のドリフト領域(17b)と、第3のドリフト領域(17c)と、第1の接続領域(22a)を含む。第1の接続領域(22a)は、第1の直線部(L1)に沿った直線と、第2の直線部(L2)に沿った直線との交点を第1の交点(13a1)とし、第3の直線部(L3)に沿った直線と、第4の直線部(L4)に沿った直線との交点を第2の交点(13b1)とした場合に、第1の交点(13a1)と第2の交点(13b1)とを含むように設けられ、かつ第2導電型を有する。これにより、スイッチング特性を向上可能な炭化珪素半導体装置およびその製造方法を提供する。
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