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1. WO2015015926 - 炭化珪素半導体装置およびその製造方法

公開番号 WO/2015/015926
公開日 05.02.2015
国際出願番号 PCT/JP2014/065775
国際出願日 13.06.2014
IPC
H01L 29/78 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
66半導体装置の型
68整流,増幅またはスイッチされる電流を流さない電極に電流のみまたは電位のみを与えることにより制御できるもの
76ユニポーラ装置
772電界効果トランジスタ
78絶縁ゲートによって生じる電界効果を有するもの
H01L 21/336 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
18不純物,例.ドーピング材料,を含むまたは含まない周期表第IV族の元素またはA↓I↓I↓IB↓V化合物から成る半導体本体を有する装置
334ユニポーラ型の装置の製造のための多段階工程
335電界効果トランジスタ
336絶縁ゲートを有するもの
H01L 29/12 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
02半導体本体
12構成材料に特徴のあるもの
CPC
H01L 21/02529
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02365Forming inorganic semiconducting materials on a substrate
02518Deposited layers
02521Materials
02524Group 14 semiconducting materials
02529Silicon carbide
H01L 21/0465
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
0445the devices having semiconductor bodies comprising crystalline silicon carbide
0455Making n or p doped regions or layers, e.g. using diffusion
046using ion implantation
0465using masks
H01L 29/086
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0856Source regions
086Impurity concentration or distribution
H01L 29/0865
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0856Source regions
0865Disposition
H01L 29/0869
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0856Source regions
0869Shape
H01L 29/0878
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
08with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
0843Source or drain regions of field-effect devices
0847of field-effect transistors with insulated gate
0852of DMOS transistors
0873Drain regions
0878Impurity concentration or distribution
出願人
  • 住友電気工業株式会社 SUMITOMO ELECTRIC INDUSTRIES, LTD. [JP/JP]; 大阪府大阪市中央区北浜四丁目5番33号 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
発明者
  • 増田 健良 MASUDA, Takeyoshi; JP
  • 堀井 拓 HORII, Taku; JP
  • 久保田 良輔 KUBOTA, Ryosuke; JP
代理人
  • 特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.; 大阪府大阪市北区中之島二丁目2番7号 中之島セントラルタワー Nakanoshima Central Tower, 2-7, Nakanoshima 2-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
優先権情報
2013-15923231.07.2013JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SILICON-CARBIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
(FR) DISPOSITIF À SEMI-CONDUCTEUR AU CARBURE DE SILICIUM ET SON PROCÉDÉ DE PRODUCTION
(JA) 炭化珪素半導体装置およびその製造方法
要約
(EN)
This silicon-carbide semiconductor device has a silicon-carbide layer (10) and a gate-insulating layer (15). The silicon-carbide layer (10) has a principal surface (10a). The gate-insulating layer (15) is laid out so as to contact the principal surface (10a) of the silicon-carbide layer (10). The silicon-carbide layer (10) contains a drift region (17) that has a first conductivity type, body regions (13) that contact said drift region (17) and have a second conductivity type that is different from the first conductivity type, source regions (14) that have the first conductivity type and are laid out so as to be separated from the drift region (17) by the body regions (13), and protruding regions (2) that contact the gate-insulating layer (15), have the first conductivity type, and are laid out so as to protrude into the body region (13) from the source regions (14) and/or the drift region (17). A silicon-carbide semiconductor device and a manufacturing method therefor that make it possible to improve the threshold voltage of said silicon-carbide semiconductor device while minimizing increases in characteristic on-resistance are thus provided.
(FR)
La présente invention concerne un dispositif à semi-conducteur au carbure de silicium présentant une couche en carbure de silicium (10) et une couche d'isolation de grille (15). La couche de carbure de silicium (10) présente une surface principale (10a). La couche d'isolation de grille (15) est disposée pour être en contact avec la surface principale (10a) de la couche en carbure de silicium (10). La couche en carbure de silicium (10) contient une région de dérive (17) qui présente un premier type de conductivité, des régions de corps (13) qui sont en contact avec ladite région de dérive (17) et présentent un second type de conductivité qui est différent du premier type de conductivité, des régions de source (14) qui présentent le premier type de conductivité et sont disposées pour qu'elles soient séparées de la région de dérive (17) par les régions de corps (13) et des régions de saillie (2) qui sont en contact avec la couche d'isolation de grille (15), présentent le premier type de conductivité et sont disposées pour qu'elles fassent saillie dans la région de corps (13) à partir des régions de source (14) et/ou de la région de dérive (17). La présente invention concerne ainsi un dispositif à semi-conducteur au carbure de silicium et son procédé de production qui permettent d'améliorer la tension seuil dudit dispositif à semi-conducteur au carbure de silicium tout en réduisant au minimum les augmentations de la résistance caractéristique.
(JA)
 炭化珪素半導体装置は、炭化珪素層(10)と、ゲート絶縁層(15)とを備える。炭化珪素層(10)は、主面(10a)を有する。ゲート絶縁層(15)は、炭化珪素層(10)の主面(10a)に接して配置されている。炭化珪素層(10)は、第1導電型を有するドリフト領域(17)と、第1導電型とは異なる第2導電型を有しかつドリフト領域(17)に接するボディ領域(13)と、第1導電型を有し、ボディ領域(13)によってドリフト領域(17)と隔てられて配置されたソース領域(14)と、ソース領域(14)およびドリフト領域(17)の少なくとも一方側からボディ領域(13)に突出するように配置され、ゲート絶縁層(15)と接し、かつ第1導電型を有する突出領域(2)とを含む。これにより、特性オン抵抗の上昇を抑制しつつ閾値電圧を向上可能な炭化珪素半導体装置およびその製造方法を提供する。
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