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1. WO2014171048 - 炭化珪素半導体装置およびその製造方法

パーマリンク
公開番号 WO/2014/171048
公開日 23.10.2014
国際出願番号 PCT/JP2014/000504
国際出願日 31.01.2014
IPC
H01L 29/78 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
66半導体装置の型
68整流,増幅またはスイッチされる電流を流さない電極に電流のみまたは電位のみを与えることにより制御できるもの
76ユニポーラ装置
772電界効果トランジスタ
78絶縁ゲートによって生じる電界効果を有するもの
H01L 21/336 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
18不純物,例.ドーピング材料,を含むまたは含まない周期表第IV族の元素またはA↓I↓I↓IB↓V化合物から成る半導体本体を有する装置
334ユニポーラ型の装置の製造のための多段階工程
335電界効果トランジスタ
336絶縁ゲートを有するもの
H01L 29/12 2006.1
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
02半導体本体
12構成材料に特徴のあるもの
CPC
H01L 21/02164
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
02164the material being a silicon oxide, e.g. SiO2
H01L 21/02178
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02172the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
02175characterised by the metal
02178the material containing aluminium, e.g. Al2O3
H01L 21/02529
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02365Forming inorganic semiconducting materials on a substrate
02518Deposited layers
02521Materials
02524Group 14 semiconducting materials
02529Silicon carbide
H01L 21/31111
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3105After-treatment
311Etching the insulating layers ; by chemical or physical means
31105Etching inorganic layers
31111by chemical means
H01L 21/31144
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3105After-treatment
311Etching the insulating layers ; by chemical or physical means
31144using masks
H01L 29/0623
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0603characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
0607for preventing surface leakage or controlling electric field concentration
0611for increasing or controlling the breakdown voltage of reverse biased devices
0615by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
0619with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
0623Buried supplementary region, e.g. buried guard ring
出願人
  • パナソニックＩＰマネジメント株式会社 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD. [JP]/[JP]
発明者
  • 工藤　千秋 KUDOU, Chiaki
代理人
  • 奥田　誠司 OKUDA, Seiji
優先権情報
2013-08539716.04.2013JP
公開言語 (言語コード) 日本語 (ja)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SILICON CARBIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
(FR) DISPOSITIF À SEMI-CONDUCTEUR AU CARBURE DE SILICIUM ET SON PROCÉDÉ DE FABRICATION
(JA) 炭化珪素半導体装置およびその製造方法
front page image
要約
(EN) This silicon carbide semiconductor device is provided with: a substrate having a main surface; a silicon carbide layer, which is disposed on the main surface side of the substrate, and which has a first conductivity-type first impurity region; a trench, which is disposed in the silicon carbide layer, and which has the bottom surface thereof positioned in the first impurity region; a trench bottom impurity layer, which is a second conductivity-type silicon carbide epitaxial layer, and which is disposed in the trench such that the trench bottom impurity layer is in contact with at least a part of the bottom surface of the trench; a gate insulating film, which covers the side surfaces of the trench and the trench bottom impurity layer; and a gate electrode that is disposed at least on a gate insulating film portion positioned in the trench.
(FR) La présente invention porte sur un dispositif à semi-conducteur au carbure de silicium qui comprend : un substrat ayant une surface principale; une couche de carbure de silicium, qui est disposée côté surface principale du substrat, et qui comporte une première région d'impureté d'un premier type de conductivité; une tranchée, qui est disposée dans la couche de carbure de silicium, et dont la surface inférieure est positionnée dans la première région d'impureté; une couche d'impureté de fond de tranchée, qui est une couche épitaxiale de carbure de silicium d'un second type de conductivité, et qui est disposée dans la tranchée de manière que la couche d'impureté de fond de tranchée soit en contact avec au moins une partie de la surface inférieure de la tranchée; un film isolant de grille, qui couvre les surfaces latérales de la tranchée et la couche d'impureté de fond de tranchée; et une électrode de grille qui est disposée au moins sur une partie du film isolant de grille positionnée dans la tranchée.
(JA) 　炭化珪素半導体装置は、主面を有する基板と、基板の主面側に配置され、第１導電型の第１不純物領域を有する炭化珪素層と、炭化珪素層に配置され、底面が第１不純物領域内に位置するトレンチと、トレンチ内に、トレンチの底面の少なくとも一部と接するように配置された、第２導電型の炭化珪素エピタキシャル層であるトレンチボトム不純物層と、トレンチの側面およびトレンチボトム不純物層を覆うゲート絶縁膜と、ゲート絶縁膜のうち少なくともトレンチ内に位置する部分の上に配置されたゲート電極とを備える。
関連特許文献
US20150179791
JPWO2014171048
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