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1. WO2013111276 - 電力用半導体装置

公開番号 WO/2013/111276
公開日 01.08.2013
国際出願番号 PCT/JP2012/051489
国際出願日 25.01.2012
IPC
H01L 25/07 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
04個別の容器を持たない装置
07装置がグループH01L29/00に分類された型からなるもの
H01L 23/28 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
H01L 23/29 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
29材料に特徴のあるもの
H01L 23/31 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
28封緘,例.封緘層,被覆
31配列に特徴のあるもの
H01L 25/18 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
CPC
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/37033
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37025Plural core members
3703Stacked arrangements
37033Three-layer arrangements
H01L 2224/371
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37099Material
371with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
H01L 2224/37124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37099Material
371with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
37117the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
37124Aluminium [Al] as principal constituent
H01L 2224/37147
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37099Material
371with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
37138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
37147Copper [Cu] as principal constituent
H01L 2224/3716
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37099Material
371with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
37138the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
3716Iron [Fe] as principal constituent
出願人
  • 三菱電機株式会社 Mitsubishi Electric Corporation [JP]/[JP] (AllExceptUS)
  • 寺井 護 TERAI Mamoru (UsOnly)
  • 太田 達雄 OTA Tatsuo (UsOnly)
  • 生田 裕也 IKUTA Hiroya (UsOnly)
  • 林 建一 HAYASHI Kenichi (UsOnly)
  • 西村 隆 NISHIMURA Takashi (UsOnly)
  • 篠原 利彰 SHINOHARA Toshiaki (UsOnly)
発明者
  • 寺井 護 TERAI Mamoru
  • 太田 達雄 OTA Tatsuo
  • 生田 裕也 IKUTA Hiroya
  • 林 建一 HAYASHI Kenichi
  • 西村 隆 NISHIMURA Takashi
  • 篠原 利彰 SHINOHARA Toshiaki
代理人
  • 大岩 増雄 OIWA Masuo
優先権情報
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) POWER SEMICONDUCTOR DEVICE
(FR) DISPOSITIF SEMI-CONDUCTEUR D'ALIMENTATION
(JA) 電力用半導体装置
要約
(EN)
The purpose of the present invention is to provide a highly reliable power semiconductor device capable of preventing cracks from being generated in a sealing resin and preventing the sealing resin from being separated from a substrate. For this purpose, the power semiconductor device is provided with: a semiconductor element substrate (4) having a surface electrode pattern (2) formed thereon; power semiconductor elements (5,6) fixed onto the surface electrode pattern via a joining material; a partition wall (9) provided on the surface electrode pattern by being joined thereto so as to surround the power semiconductor elements; a first sealing resin (120) which fills the inside of the partition wall and covers the power semiconductor elements and the surface electrode pattern inside the partition wall; and a second sealing resin (12) which covers the partition wall, the first sealing resin and the semiconductor element substrate exposed outside the partition wall. The elastic modulus of the second sealing resin is set to be smaller than the elastic modulus of the first sealing resin. A relay terminal electrode (8) is provided on the surface of the partition wall not in contact with the surface electrode pattern, and a wire (130) is pulled out from the inside of the partition wall to the outside of the partition wall via the relay terminal electrode.
(FR)
L'objet de la présente invention est de fournir un dispositif semi-conducteur d'alimentation hautement fiable capable de prévenir la génération des fissures dans une résine d'étanchéité et la prévention de la génération de résine d'étanchéité à partir d'un substrat. À cet effet, le dispositif semi-conducteur d'alimentation est prévu avec : un substrat d'élément semi-conducteur (4) ayant un motif d'électrode de surface (2) formé sur celui-ci ; éléments semi-conducteurs d'alimentation (5, 6) fixés sur le motif d'électrode de surface par l'intermédiaire d'un matériau d'assemblage ; une paroi de séparation (9) prévue sur le motif d'électrode de surface en étant joint de manière à entourer les éléments semi-conducteurs d'alimentation ; une première résine d'étanchéité (120) qui remplit l'intérieur de la paroi de séparation et recouvre les éléments semi-conducteurs d'alimentation et le motif d'électrode de surface à l'intérieur de la paroi de séparation ; et une seconde résine d'étanchéité (12) qui recouvre la paroi de séparation, la première résine de scellement et le substrat d'élément semi-conducteur exposé à l'extérieur de la paroi de séparation. Le module élastique de la seconde résine d'étanchéité est réglé de façon à être inférieur au module élastique de la première résine d'étanchéité. Une électrode de borne de relais (8) est fournie sur la surface de la paroi de séparation qui n'est pas en contact avec le motif d'électrode de surface, et un fil (130) est tiré à partir de l'intérieur de la paroi de séparation vers l'extérieur de la paroi de séparation par l'intermédiaire de l'électrode de borne relais.
(JA)
 この発明は封止樹脂に亀裂が生じたり、基板から剥離を起こしたりし難い信頼性の高い電力用半導体装置を得ることを目的とする。 このため、表面電極パターン(2)が形成された半導体素子基板(4)と、表面電極パターンに接合材を介して固着された電力用半導体素子(5、6)と、電力用半導体素子を囲むように、表面電極パターン上に接合されて設けられた区画壁(9)と、この区画壁の内側に満たされ、電力用半導体素子および区画壁内の表面電極パターンを覆う第一の封止樹脂(120)と、区画壁と、第一の封止樹脂と、区画壁から外に露出した半導体素子基板とを覆う第二の封止樹脂(12)と、を備え、第二の封止樹脂の弾性率は、第一の封止樹脂の弾性率よりも小さく設定され、区画壁の、表面電極パターンに接触していない面に中継端子用電極(8)を備え、区画壁内から区画壁外への配線(130)を、中継端子用電極を介して引き出すようにした。
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