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1. WO2013008424 - 電力用半導体モジュール

公開番号 WO/2013/008424
公開日 17.01.2013
国際出願番号 PCT/JP2012/004356
国際出願日 05.07.2012
IPC
H01L 25/07 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
04個別の容器を持たない装置
07装置がグループH01L29/00に分類された型からなるもの
H01L 25/18 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
CPC
H01L 2224/48227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48225the item being non-metallic, e.g. insulating substrate with or without metallisation
48227connecting the wire to a bond pad of the item
H01L 2224/49111
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
49of a plurality of wire connectors
491Disposition
4911the connectors being bonded to at least one common bonding area, e.g. daisy chain
49111the connectors connecting two common bonding areas, e.g. Litz or braid wires
H01L 2224/4917
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
49of a plurality of wire connectors
491Disposition
4912Layout
4917Crossed wires
H01L 2224/49175
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
49of a plurality of wire connectors
491Disposition
4912Layout
49175Parallel arrangements
H01L 23/28
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
H01L 23/3121
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
3107the device being completely enclosed
3121a substrate forming part of the encapsulation
出願人
  • 三菱電機株式会社 Mitsubishi Electric Corporation [JP]/[JP] (AllExceptUS)
  • 三木 隆義 MIKI, Takayoshi (UsOnly)
  • 中山 靖 NAKAYAMA, Yasushi (UsOnly)
  • 大井 健史 OI, Takeshi (UsOnly)
  • 多田 和弘 TADA, Kazuhiro (UsOnly)
  • 井高 志織 IDAKA, Shiori (UsOnly)
  • 長谷川 滋 HASEGAWA, Shigeru (UsOnly)
  • 小林 知宏 KOBAYASHI, Tomohiro (UsOnly)
  • 中嶋 幸夫 NAKASHIMA, Yukio (UsOnly)
発明者
  • 三木 隆義 MIKI, Takayoshi
  • 中山 靖 NAKAYAMA, Yasushi
  • 大井 健史 OI, Takeshi
  • 多田 和弘 TADA, Kazuhiro
  • 井高 志織 IDAKA, Shiori
  • 長谷川 滋 HASEGAWA, Shigeru
  • 小林 知宏 KOBAYASHI, Tomohiro
  • 中嶋 幸夫 NAKASHIMA, Yukio
代理人
  • 高橋 省吾 TAKAHASHI, Shogo
優先権情報
2011-15302011.07.2011JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) POWER SEMICONDUCTOR MODULE
(FR) MODULE À SEMI-CONDUCTEURS DE PUISSANCE
(JA) 電力用半導体モジュール
要約
(EN)
Provided is a power semiconductor module, which suppresses a temperature increase of a wide band gap semiconductor element, suppresses an increase of the total chip area of the wide band gap semiconductor element, and can be manufactured at low cost, in the case of disposing a Si semiconductor element and the wide band gap semiconductor element in a same power semiconductor module. Switching elements (4) composed of Si are disposed in a center region of a power semiconductor module (100), and diode elements (5) composed of SiC are disposed on both the sides of the center region of the power semiconductor module (100) or on a peripheral section that surrounds the center region.
(FR)
La présente invention concerne un module à semi-conducteurs de puissance qui supprime l'augmentation de température d'un élément semi-conducteur à large bande interdite, qui supprime l'accroissement de la surface occupée globale de l'élément semi-conducteur à large bande interdite, et qui peut être fabriqué à bas coût, lorsqu'un élément semi-conducteur de Si et l'élément semi-conducteur à large bande interdite se trouvent dans le même module à semi-conducteurs de puissance. Des éléments de commutation (4) composés de Si se situent dans une région centrale d'un module à semi-conducteurs de puissance (100), et des éléments diodes (5) composés de SiC sont disposés sur les deux côtés de la région centrale du module à semi-conducteurs de puissance (100) ou sur une section périphérique entourant la région centrale.
(JA)
Si半導体素子とワイドバンドギャップ半導体素子とを同一の電力用半導体モジュール内に配置する場合、ワイドバンドギャップ半導体素子の温度上昇を低く抑え、ワイドバンドギャップ半導体素子のチップ総面積の増大を抑え、低コストで製造できる電力用半導体モジュールを得る。Si製スイッチング素子(4)が電力用半導体モジュール(100)の中央領域に配置され、SiC製ダイオード素子(5)が電力用半導体モジュール(100)の中央領域の両側または中央領域を囲む周辺部に配置される。
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