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1. WO2011064971 - 電子装置の製造方法、電子装置、電子装置パッケージの製造方法、電子装置パッケージ

公開番号 WO/2011/064971
公開日 03.06.2011
国際出願番号 PCT/JP2010/006794
国際出願日 19.11.2010
IPC
H01L 23/12 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
12マウント,例.分離できない絶縁基板
H01L 25/10 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
10個別の容器をもつ装置
H01L 25/11 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
03すべての装置がグループH01L27/00~H01L51/00の同じサブグループに分類される型からなるもの,例.整流ダイオードの組立体
10個別の容器をもつ装置
11装置がグループH01L29/00に分類された型からなるもの
H01L 25/18 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
25複数の個々の半導体または他の固体装置からなる組立体
18装置がグループH01L27/00~H01L51/00の同じメイングループの2つ以上の異なるサブグループに分類される型からなるもの
CPC
H01L 21/565
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
565Moulds
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/451
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
44Structure, shape, material or disposition of the wire connectors prior to the connecting process
45of an individual wire connector
45001Core members of the connector
45099Material
451with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
H01L 2224/48091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
4805Shape
4809Loop shape
48091Arched
H01L 2224/48227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
42Wire connectors; Manufacturing methods related thereto
47Structure, shape, material or disposition of the wire connectors after the connecting process
48of an individual wire connector
481Disposition
48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
48221the body and the item being stacked
48225the item being non-metallic, e.g. insulating substrate with or without metallisation
48227connecting the wire to a bond pad of the item
出願人
  • 住友ベークライト株式会社 SUMITOMO BAKELITE CO., LTD. [JP]/[JP] (AllExceptUS)
  • 川田 政和 KAWATA, Masakazu [JP]/[JP] (UsOnly)
  • 竹内 江津 TAKEUCHI, Etsu [JP]/[JP] (UsOnly)
  • 楠木 淳也 KUSUNOKI, Junya [JP]/[JP] (UsOnly)
  • 杉山 広道 SUGIYAMA, Hiromichi [JP]/[JP] (UsOnly)
発明者
  • 川田 政和 KAWATA, Masakazu
  • 竹内 江津 TAKEUCHI, Etsu
  • 楠木 淳也 KUSUNOKI, Junya
  • 杉山 広道 SUGIYAMA, Hiromichi
代理人
  • 速水 進治 HAYAMI, Shinji
優先権情報
2009-27011027.11.2009JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) PRODUCTION METHOD FOR ELECTRONIC DEVICE, ELECTRONIC DEVICE, PRODUCTION METHOD FOR ELECTRONIC DEVICE PACKAGE, AND ELECTRONIC DEVICE PACKAGE
(FR) PROCÉDÉ DE PRODUCTION D'UN DISPOSITIF ÉLECTRONIQUE, DISPOSITIF ÉLECTRONIQUE, PROCÉDÉ DE PRODUCTION D'UN BOÎTIER DE DISPOSITIF ÉLECTRONIQUE, ET BOÎTIER DE DISPOSITIF ÉLECTRONIQUE
(JA) 電子装置の製造方法、電子装置、電子装置パッケージの製造方法、電子装置パッケージ
要約
(EN)
Disclosed is a production method for an electronic device that involves a process for disposing an electronic component (10) upon a base (a substrate) (11); a process for providing an upright section (13) that is erected upon the surface of the base (11) whereon the electronic component (10) has been disposed and that is formed comprising a resin having pyrolytic properties; a process for providing a sealing member (14) in a manner enveloping the aforementioned electronic component (10) and covering around the aforementioned upright section (13), and in a manner such that a portion of the aforementioned upright section (13) protrudes from the surface thereof; a process for forming a hole (141) penetrating the aforementioned sealing member (14) by heating the aforementioned upright section (13) and dissolving and removing the aforementioned upright section (13); and a process for disposing a conductor (15) within the aforementioned hole (141).
(FR)
La présente invention concerne un procédé de production d'un dispositif électronique, comprenant les processus suivants : mise en place d'un composant électronique (10) sur une base (un substrat) (11) ; fourniture d'une section droite (13), érigée sur la surface de la base (11) sur laquelle le composant électronique (10) a été disposé, et formée avec une résine possédant des propriétés pyrolytiques ; fourniture d'un élément de scellement (14), de manière à envelopper ledit composant électronique (10) et recouvrir ladite section droite (13) de sorte qu'une partie de ladite section droite (13) dépasse de sa surface ; formation d'un trou (141) pénétrant l'élément de scellement (14), en chauffant ladite section droite (13) et en dissolvant puis en retirant ladite section droite (13) ; et mise en place d'un conducteur (15) dans ledit trou (141).
(JA)
電子装置の製造方法は、基材(基板)(11)上に電子部品(10)を配置する工程と、基材(11)の電子部品(10)が配置された面上に立設され、熱分解性の樹脂を含んで構成される立設部(13)を設ける工程と、前記電子部品(10)を埋め込み、前記立設部(13)の周囲を覆うとともに、表面から前記立設部(13)の一部が露出するように、封止材(14)を設ける工程と、前記立設部(13)を加熱して、前記立設部(13)を分解し、除去することにより、前記封止材(14)を貫通する孔(141)を形成する工程と、前記孔(141)内に導電体(15)を設ける工程とを含む。
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