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1. WO2011064817 - 半導体装置とその製造方法

公開番号 WO/2011/064817
公開日 03.06.2011
国際出願番号 PCT/JP2009/006371
国際出願日 26.11.2009
IPC
H01L 21/60 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
50サブグループH01L21/06~H01L21/326の一つに分類されない方法または装置を用いる半導体装置の組立
60動作中の装置にまたは装置から電流を流すためのリードまたは他の導電部材の取り付け
H01L 23/50 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
23半導体または他の固体装置の細部
48動作中の固体本体からまたは固体本体へ電流を導く装置,例.リードまたは端子装置
50集積回路装置用
CPC
H01L 2224/05553
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
0555Shape
05552in top view
05553being rectangular
H01L 2224/05624
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05599Material
056with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
05617the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
05624Aluminium [Al] as principal constituent
H01L 2224/0603
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
0601Structure
0603Bonding areas having different sizes, e.g. different heights or widths
H01L 2224/32245
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32245the item being metallic
H01L 2224/37124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
36Structure, shape, material or disposition of the strap connectors prior to the connecting process
37of an individual strap connector
37001Core members of the connector
37099Material
371with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
37117the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
37124Aluminium [Al] as principal constituent
H01L 2224/40091
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
39Structure, shape, material or disposition of the strap connectors after the connecting process
40of an individual strap connector
4005Shape
4009Loop shape
40091Arched
出願人
  • パナソニック株式会社 PANASONIC CORPORATION [JP]/[JP] (AllExceptUS)
  • 藤岡知恵 FUJIOKA, Chie (UsOnly)
発明者
  • 藤岡知恵 FUJIOKA, Chie
代理人
  • 原田洋平 HARADA, Yohei
優先権情報
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
(FR) DISPOSITIF SEMI-CONDUCTEUR ET PROCÉDÉ POUR SA FABRICATION
(JA) 半導体装置とその製造方法
要約
(EN)
The back surface of a lead frame (301) is provided with a projected part (310). During ultrasonic bonding, the lead frame (301) is placed on a stage and the projected part (310) is brought into contact with the stage or inserted into the stage, so that the lead frame (301) can be firmly held on the stage.
(FR)
Selon l'invention, la surface postérieure d'une grille de connexion (301) comprend une partie en saillie (310). Pendant le soudage par ultrasons, la grille de connexion (301) est placée sur une platine et la partie en saillie (310) est placée au contact de la platine ou insérée dans la platine, si bien que la grille de connexion (301) peut être solidement fixée sur la platine.
(JA)
 リードフレーム301の裏面に突起部310を設け、超音波ボンディングの際に、リードフレーム301をステージ上に載置し、突起部310をステージに当接または挿入することにより、リードフレーム301をステージ上に強固に保持することができる。
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