処理中

しばらくお待ちください...

設定

設定

出願の表示

1. WO2009063588 - 半導体装置及びその製造方法

公開番号 WO/2009/063588
公開日 22.05.2009
国際出願番号 PCT/JP2008/002758
国際出願日 01.10.2008
IPC
H01L 29/78 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
29整流,増幅,発振またはスイッチングに特に適用される半導体装置であり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁,例.PN接合空乏層またはキャリア集中層,を有するコンデンサーまたは抵抗器;半導体本体または電極の細部
66半導体装置の型
68整流,増幅またはスイッチされる電流を流さない電極に電流のみまたは電位のみを与えることにより制御できるもの
76ユニポーラ装置
772電界効果トランジスタ
78絶縁ゲートによって生じる電界効果を有するもの
H01L 21/336 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
18不純物,例.ドーピング材料,を含むまたは含まない周期表第IV族の元素またはA↓I↓I↓IB↓V化合物から成る半導体本体を有する装置
334ユニポーラ型の装置の製造のための多段階工程
335電界効果トランジスタ
336絶縁ゲートを有するもの
CPC
H01L 21/823412
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
823412with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
H01L 21/823418
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
823418with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
H01L 21/823481
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
823481isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
H01L 21/823807
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823807with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
H01L 21/823814
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823814with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
H01L 21/823878
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823878isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure
出願人
  • パナソニック株式会社 PANASONIC CORPORATION [JP]/[JP] (AllExceptUS)
  • 鈴木健 SUZUKI, Ken (UsOnly)
  • 鈴木純 SUZUKI, Jun (UsOnly)
発明者
  • 鈴木健 SUZUKI, Ken
  • 鈴木純 SUZUKI, Jun
代理人
  • 前田弘 MAEDA, Hiroshi
優先権情報
2007-29763916.11.2007JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET PROCÉDÉ DE FABRICATION DE CELUI-CI
(JA) 半導体装置及びその製造方法
要約
(EN)
A semiconductor device is provided with an element isolating region (11a) formed in a semiconductor substrate (10); an active region, which is composed of the semiconductor substrate (10) surrounded by the element isolating region (11a) and has a trench section; a first conductivity type MIS transistor which has a gate electrode (13) formed on the active region, a first side wall (19) formed between the gate electrode (13) and a trench section on a side surface of the gate electrode (13) in plane view, and a first conductivity type silicon mixed crystal layer (21)applied in the trench section; a substrate region which is arranged between the trench section and element isolating regions (11a, 11b) and is composed of the semiconductor substrate (10); and a first conductivity type impurity region (22) formed in the substrate region. The silicon mixed crystal layer (21) permits a stress to be generated to a channel region in the active region.
(FR)
Un dispositif à semi-conducteur est doté d'une région d'isolation d'élément (11a) formée dans un substrat semi-conducteur (10) ; d'une région active, composée du substrat semi-conducteur (10) entourée par la région d'isolation d'élément (11a) et comportant une section de tranchée ; un transistor MIS d'un premier type de conductivité comportant une électrode de grille (13) formée sur la région active, une première paroi latérale (19) formée entre l'électrode de grille (13) et une section de tranchée sur une surface latérale de l'électrode de grille (13) en vue en plan, et une couche de mélange cristal-silicium (21) d'un premier type de conductivité appliquée dans la section de tranchée ; une région de substrat disposée entre la section de tranchée et les régions d'isolation d'élément (11a, 11b) et composée du substrat semi-conducteur (10) ; et une région d'impureté (22) d'un premier type de conductivité formée dans la région de substrat. La couche de mélange cristal-silicium (21) permet de générer une contrainte sur une région de canal dans la région active.
(JA)
 半導体装置は、半導体基板10内に形成された素子分離領域11aと、素子分離領域11aに囲まれた半導体基板10からなり、トレンチ部を有する活性領域と、活性領域上に形成されたゲート電極13、ゲート電極13の側面上であって、平面的に見てゲート電極13とトレンチ部との間に形成された第1のサイドウォール19、及びトレンチ部内に充填された第1導電型のシリコン混晶層21を有する第1導電型のMISトランジスタと、トレンチ部と素子分離領域11a、11bとの間に設けられ、半導体基板10からなる基板領域と、基板領域に形成された第1導電型の不純物領域22とを備えている。シリコン混晶層21は、活性領域のチャネル領域に対して応力を生じさせる。
国際事務局に記録されている最新の書誌情報