処理中

しばらくお待ちください...

設定

設定

1. WO2007108237 - 多層プリント配線板及びその部品実装方法

公開番号 WO/2007/108237
公開日 27.09.2007
国際出願番号 PCT/JP2007/051736
国際出願日 01.02.2007
IPC
H05K 3/34 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
30電気部品,例.抵抗器,を印刷回路に取り付けること
32印刷回路に対する電気部品または電線の電気的接続
34ハンダ付けによるもの
H05K 3/46 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
46多重層回路の製造
CPC
H01L 2224/05568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
0556Disposition
05568the whole external layer protruding from the surface
H01L 2224/05573
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05573Single external layer
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2224/73253
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
732Location after the connecting process
73251on different surfaces
73253Bump and layer connectors
H01L 2924/00014
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
0001Technical content checked by a classifier
00014the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
出願人
  • イビデン株式会社 IBIDEN CO., LTD. [JP/JP]; 〒5038604 岐阜県大垣市神田町2丁目1番地 Gifu 2-1 Kanda-cho, Ogaki-shi, Gifu 5038604, JP (AllExceptUS)
  • 横幕 俊彦 YOKOMAKU, Toshihiko [JP/JP]; JP (UsOnly)
発明者
  • 横幕 俊彦 YOKOMAKU, Toshihiko; JP
代理人
  • 高橋要泰 TAKAHASHI, Toshihiro; 〒1670051 東京都杉並区荻窪4-28-9 荻窪サニーガーデン301 Tokyo No. 301, Ogikubo Sunny Garden 4-28-9, Ogikubo Suginami-ku Tokyo 1670051, JP
優先権情報
2006-08166423.03.2006JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) MULTILAYER PRINTED-CIRCUIT BOARD, AND ITS PARTS MOUNTING METHOD
(FR) circuit imprimé multicouche et méthode de montage des composants
(JA) 多層プリント配線板及びその部品実装方法
要約
(EN)
Provided are a multilayer printed-circuit board, which can mount parts easily, which is excellent in working efficiency or which is easily reworkable, and a mounting method therefor. The method mounts the parts of the multilayer printed-circuit board, which is formed with a plurality of solder bumps for mounting the electronic parts on the surface side and/or the back side. The solder bumps are individually formed of any of a first solder, a second solder and a third solder, and the electronic parts and so on are soldered sequentially from the higher melting point, when the first solder, the second solder and the third solder have melting points in the order of a higher temperature of the first solder, the second solder and the third solder. At this time, it is preferred that the solder bump having the larger volume is soldered the earlier.
(FR)
L'invention concerne une carte de circuit imprimé multicouche, sur laquelle on peut monter les composants sans difficulté, qui présente une excellente productivité ou que l'on peut retoucher facilement et une méthode de montage associée. La méthode monte les composants de la carte de circuit imprimé multicouche, qui est formée d'une pluralité de perles de soudure pour monter les composants électroniques sur le dessus de la carte et/ou le dessous de la carte. Les perles de soudure se composent individuellement de l'une des soudures suivantes : première soudure, seconde soudure et troisième soudure, et les composants électroniques et autres sont soudés séquentiellement en partant du point de fusion dont la température est la plus élevée, la première soudure, la seconde soudure et la troisième soudure ayant des points de fusion classés en ordre décroissant, le point de fusion de la première soudure ayant la température de fusion la plus élevée, puis la seconde soudure et la troisième soudure. Il est également préférable que les perles de soudure ayant le plus gros volume soient soudées en premier.
(JA)
 部品実装が容易であり、作業能率に優れ、或いはリワーカブルの容易な多層プリント配線板及びその実装方法を提供すること  表面側及び裏面側の両方又は片方に、電子部品等実装用の複数個の半田バンプが形成された多層プリント配線板の部品実装方法であって、前記半田バンプは、各々、第1半田、第2半田及び第3半田のいずれから形成し、第1半田、第2半田及び第3半田の融点は、温度の高い方から、第1半田、第2半田、第3半田の順番となっているとき、融点温度の高い方から順番に電子部品等を半田付けする。更に、この際、半田バンプの体積が大きい方を先に半田付けすることが好ましい。
Other related publications
国際事務局に記録されている最新の書誌情報