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1. WO2007102341 - 抵抗変化型素子、半導体装置、およびその製造方法

公開番号 WO/2007/102341
公開日 13.09.2007
国際出願番号 PCT/JP2007/053610
国際出願日 27.02.2007
IPC
H01L 27/10 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
271つの共通基板内または上に形成された複数の半導体構成部品または他の固体構成部品からなる装置
02整流,発振,増幅またはスイッチングに特に適用される半導体構成部品を含むものであり,少なくとも1つの電位障壁または表面障壁を有するもの;少なくとも1つの電位障壁または表面障壁を有する集積化された受動回路素子を含むもの
04基板が半導体本体であるもの
10複数の個々の構成部品を反復した形で含むもの
H01L 45/00 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
45電位障壁または表面障壁をもたず,整流,増幅,発振またはスイッチングに特に適用される固体装置,例.誘電体三極素子;オブシンスキー効果装置;それらの装置またはその部品の製造または処理に特に適用される方法または装置
H01L 49/00 2006.01
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
49H01L27/00~H01L47/00およびH01L51/00に分類されず,他のサブクラスにも分類されない固体装置;それらの装置またはその部品の製造または処理に特に適用される方法または装置
CPC
H01L 27/101
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
101including resistors or capacitors only
H01L 27/2409
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
24including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, ; e.g. resistance switching non-volatile memory structures
2409comprising two-terminal selection components, e.g. diodes
H01L 27/2436
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
24including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, ; e.g. resistance switching non-volatile memory structures
2436comprising multi-terminal selection components, e.g. transistors
H01L 27/2463
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
24including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, ; e.g. resistance switching non-volatile memory structures
2463Arrangements comprising multiple bistable or multistable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays, details of the horizontal layout
H01L 27/2481
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
24including solid state components for rectifying, amplifying or switching without a potential-jump barrier or surface barrier, ; e.g. resistance switching non-volatile memory structures
2463Arrangements comprising multiple bistable or multistable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays, details of the horizontal layout
2481arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays, details of the vertical layout
H01L 45/04
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
45Solid state devices adapted for rectifying, amplifying, oscillating or switching without a potential-jump barrier or surface barrier, e.g. dielectric triodes; Ovshinsky-effect devices; Processes or apparatus peculiar to the manufacture or treatment thereof or of parts thereof
04Bistable or multistable switching devices, e.g. for resistance switching non-volatile memory
出願人
  • 松下電器産業株式会社 MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. [JP/JP]; 〒5718501 大阪府門真市大字門真1006番地 Osaka 1006, Oaza Kadoma, Kadoma-shi, Osaka 5718501, JP (AllExceptUS)
  • 魏 志強 WEI, Zhiqiang; null (UsOnly)
  • 三河 巧 MIKAWA, Takumi; null (UsOnly)
  • 高木 剛 TAKAGI, Takeshi; null (UsOnly)
  • 川島 良男 KAWASHIMA, Yoshio; null (UsOnly)
発明者
  • 魏 志強 WEI, Zhiqiang; null
  • 三河 巧 MIKAWA, Takumi; null
  • 高木 剛 TAKAGI, Takeshi; null
  • 川島 良男 KAWASHIMA, Yoshio; null
代理人
  • 角田 嘉宏 SUMIDA, Yoshihiro; 〒6500031 兵庫県神戸市中央区東町123番地の1 貿易ビル3階 特許業務法人 有古特許事務所 Hyogo PATENT CORPORATE BODY ARCO PATENT OFFICE 3rd Fl., Bo-eki Bldg. 123-1, Higashimachi Chuo-ku, Kobe-shi, Hyogo 6500031, JP
優先権情報
2006-06427709.03.2006JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) RESISTANCE-VARYING TYPE ELEMENT, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE ELEMENT
(FR) ÉlÉment À rÉsistance variable, dispositif semi-conducteur, ET PROCÉDÉ DE FABRICATION de l'ÉlÉmént
(JA) 抵抗変化型素子、半導体装置、およびその製造方法
要約
(EN)
Provided is a method for manufacturing a resistance-varying type element, which comprises the step of depositing a resistance-varying material (106) in such a manner in a contact hole formed in an inter-layer insulating layer (104) and having a lower electrode (103) on the bottom, that the upper face in the contact hole may be positioned below the upper face of the inter-layer insulating layer (104), the step of depositing an upper electrode material (107) in such a manner on the resistance-varying material (106), that the upper face in the contact hole may be positioned over the upper face of the inter-layer insulating layer (104), and the step of eliminating the resistance-varying material (106) and the upper electrode material (107) on the upper face of the inter-layer insulating layer (104) by the CMP. The resistance-varying type element thus obtained is individually separated for each element, and has an upper electrode (109) formed to bulge toward a resistance-varying layer (108).
(FR)
L'invention concerne un procédé de fabrication d'un élément à résistance variable, comprenant la phase consistant à déposer un matériau à résistance variable (106) dans un trou de contact formé dans une couche isolante intercouche (104) et possédant une électrode inférieure (103) au fond, de telle manière que la face supérieure dans le trou de contact peut être positionnée sous la face supérieure de la couche isolante intercouche (104), la phase consistant à déposer un matériau d'électrode supérieur (107) sur le matériau à résistance variable (106), de telle manière que la face supérieure dans le trou de contact peut être positionnée sur la face supérieure de la couche isolante intercouche (104), et la phase consistant à éliminer le matériau à résistance variable (106) et le matériau d'électrode supérieur (107) sur la face supérieure de la couche isolante intercouche (104) par le CMP. L'élément à résistance variable ainsi obtenu est séparé individuellement pour chaque élément, et possède une électrode supérieure (109) formée pour faire saillie vers une couche à résistance variable (108).
(JA)
not available
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