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1. WO2005032227 - プリント配線板用層間絶縁層、プリント配線板およびその製造方法

公開番号 WO/2005/032227
公開日 07.04.2005
国際出願番号 PCT/JP2004/014672
国際出願日 29.09.2004
IPC
H05K 3/00 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
H05K 3/04 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
02導電性物質が絶縁支持部材の表面に施されその後電流の伝導や遮へいのために使わない部分が表面から取り除かれるもの
04導電性物質が機械的に取り除かれるもの,例.パンチによるもの
H05K 3/10 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
10導電性物質が希望する導電模様を形成するように絶縁支持部材に施されるもの
H05K 3/46 2006.01
H電気
05他に分類されない電気技術
K印刷回路;電気装置の箱体または構造的細部,電気部品の組立体の製造
3印刷回路を製造するための装置または方法
46多重層回路の製造
CPC
H01L 2224/0554
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
H01L 2224/05568
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
0556Disposition
05568the whole external layer protruding from the surface
H01L 2224/05573
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
0554External layer
05573Single external layer
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 23/145
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
14characterised by the material or its electrical properties
145Organic substrates, e.g. plastic
H01L 23/49822
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49822Multilayer substrates
出願人
  • イビデン株式会社 IBIDEN CO., LTD. [JP]/[JP] (AllExceptUS)
  • 浅井 元雄 ASAI, Motoo [JP]/[JP] (UsOnly)
  • 野田 宏太 NODA, Kouta [JP]/[JP] (UsOnly)
  • 稲垣 靖 INAGAKI, Yasushi [JP]/[JP] (UsOnly)
発明者
  • 浅井 元雄 ASAI, Motoo
  • 野田 宏太 NODA, Kouta
  • 稲垣 靖 INAGAKI, Yasushi
代理人
  • 小川 順三 OGAWA, Junzo
優先権情報
2003-33686129.09.2003JP
2004-19486830.06.2004JP
公開言語 (言語コード) 日本語 (JA)
出願言語 (言語コード) 日本語 (JA)
指定国 (国コード)
発明の名称
(EN) INTERLAYER INSULATING LAYER FOR PRINTED WIRING BOARD, PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING SAME
(FR) INTERCOUCHE D'ISOLATION POUR CARTE DE CONNEXIONS IMPRIMEE, CARTE DE CONNEXIONS IMPRIMEE ET PROCEDE DE FABRICATION ASSOCIE
(JA) プリント配線板用層間絶縁層、プリント配線板およびその製造方法
要約
(EN)
Disclosed is an interlayer insulating layer for printed wiring boards which is formed on a base and composed of a curing resin wherein scale-like particles are dispersed. Also disclosed is a printed wiring board which is excellently improved in heat cycle resistance and mounting reliability without lowering heat resistance, electrical insulation, heat dissipation, connection reliability or chemical stability. Further disclosed is a method for manufacturing a printed wiring board which enables to transfer a wiring pattern or a via hole to the interlayer insulating layer easily and accurately by an imprinting method wherein a mold having a projected portion corresponding to the wiring pattern is used. The method does not require an optical transfer method or a complicated etching for forming the wiring pattern or via hole. With this method, a printed wiring board having a very fine wiring pattern which is excellent in insulation reliability and interlayer connection can be easily mass-produced at low cost.
(FR)
L'invention concerne une intercouche d'isolation pour des cartes de connexions imprimées, laquelle est formée sur un substrat et composée d'une résine pouvant être durcie dans laquelle sont dispersées des particules de type écaille. L'invention concerne également une carte de connexions imprimée grandement améliorée pour ce qui est de la résistance aux cycles de chaleur et la fiabilité d'assemblage sans que ne soient diminuées les qualités d'isolation électrique, de dissipation de la chaleur et de fiabilité de connexion ou de stabilité chimique. L'invention concerne encore un procédé de fabrication d'une carte de connexions imprimée qui permet de transférer facilement et avec précision un motif de connexions ou un trou de raccordement sur l'intercouche d'isolation, au moyen d'un procédé d'impression dans lequel un moule possédant une partie en saillie correspondant au motif de connexions est utilisé. Ce procédé ne nécessite pas de procédé de transfert optique ou de gravure compliquée pour former le motif de connexions ou le trou de raccordement. Grâce à ce procédé, une carte de connexions imprimée possédant un motif de connexions très fin, excellente pour ce qui est de la fiabilité d'isolation et la connexion intercouche, peut être produite en série à faible coût.
(JA)
基体上に形成され、硬化樹脂中に鱗片状粒子を分散させてなるプリント配線板用の層間絶縁層であり、耐熱性、電気絶縁性、放熱性、接続信頼性および化学的安定性を低下させることなく、耐ヒートサイクル性および実装信頼性に優れたプリント配線板を提供する。また、配線パターンやバイアホールの形成に光学的な転写方法や煩雑なエッチング処理を用いることなく、配線パターンに対応する凸部を有するモールドを用いたインプリント法によって、層間絶縁層内に配線パターンやバイアホールを容易かつ正確に転写できる、プリント配線板の製造方法を提案する。これによって、絶縁信頼性や層間接続性に優れると共に配線パターンが微細化された多層プリント配線板を極めて容易にしかも低コストで大量生産できる。
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