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1. JP2009099897 - プラズマ成膜装置

パーマリンク
官庁
日本国
出願番号 2007272233
出願日 19.10.2007
公開番号 2009099897
公開日 07.05.2009
特許番号 5260023
特許付与日 02.05.2013
公報種別 B2
IPC
H01L 21/31
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
02半導体装置またはその部品の製造または処理
04少なくとも一つの電位障壁または表面障壁,例.PN接合,空乏層,キャリア集中層,を有する装置
18不純物,例.ドーピング材料,を含むまたは含まない周期表第IV族の元素またはA↓I↓I↓IB↓V化合物から成る半導体本体を有する装置
30H01L21/20~H01L21/26に分類されない方法または装置を用いる半導体本体の処理
31半導体本体上への絶縁層の形成,例.マスキング用またはフォトリソグラフィック技術の使用によるもの;これらの層の後処理;これらの層のための材料の選択
C23C 16/458
C化学;冶金
23金属質材料への被覆;金属質材料による材料への被覆;化学的表面処理;金属質材料の拡散処理;真空蒸着,スパッタリング,イオン注入法,または化学蒸着による被覆一般;金属質材料の防食または鉱皮の抑制一般
C金属質への被覆;金属材料による材料への被覆;表面への拡散,化学的変換または置換による,金属材料の表面処理;真空蒸着,スパッタリング,イオン注入法または化学蒸着による被覆一般
16ガス状化合物の分解による化学的被覆であって,表面材料の反応生成物を被覆層中に残さないもの,すなわち化学蒸着(CVD)法
44被覆の方法に特徴のあるもの
458反応室の基板を支えるのに使われる方法に特徴があるもの
H01L 21/683
H電気
01基本的電気素子
L半導体装置,他に属さない電気的固体装置
21半導体装置または固体装置またはそれらの部品の製造または処理に特に適用される方法または装置
67製造または処理中の半導体または電気的固体装置の取扱いに特に適用される装置;半導体または電気的固体装置もしくは構成部品の製造または処理中のウエハの取扱いに特に適用される装置
683支持または把持のためのもの
CPC
C23C 16/4585
CCHEMISTRY; METALLURGY
23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
44characterised by the method of coating
458characterised by the method used for supporting substrates in the reaction chamber
4582Rigid and flat substrates, e.g. plates or discs
4583the substrate being supported substantially horizontally
4585Devices at or outside the perimeter of the substrate support, e.g. clamping rings, shrouds
C23C 16/50
CCHEMISTRY; METALLURGY
23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
44characterised by the method of coating
50using electric discharges
H01L 21/68735
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; ; Apparatus not specifically provided for elsewhere
683for supporting or gripping
687using mechanical means, e.g. chucks, clamps or pinches
68714the wafers being placed on a susceptor, stage or support
68735characterised by edge profile or support profile
H01L 21/0217
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
0217the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
H01L 21/02274
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02225characterised by the process for the formation of the insulating layer
0226formation by a deposition process
02263deposition from the gas or vapour phase
02271deposition by decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
02274in the presence of a plasma [PECVD]
H01L 21/31
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
出願人 MITSUBISHI HEAVY IND LTD
三菱重工業株式会社
発明者 KAFUKU HIDENARU
加福　秀考
SHIMAZU TADASHI
嶋津　正
MATSUDA RYUICHI
松田　竜一
MATSUKURA AKIHIKO
松倉　明彦
NISHIKAWA SEIJI
西川　誠二
代理人 光石　俊郎
光石　忠敬
田中　康幸
松元　洋
発明の名称
(EN) PLASMA DEPOSITION APPARATUS
(JA) プラズマ成膜装置
要約
(EN)

PROBLEM TO BE SOLVED: To provide a plasma deposition apparatus capable of reducing particles even when forming a film by applying bias to a substrate.

SOLUTION: In the plasma deposition apparatus for applying bias to a wafer 5 mounted on a support 4 in a chamber and forming a thin film on the wafer 5 by using plasma, the support 4 includes a cylindrical support body 4b of which the outer diameter C of a contact surface 4a with the wafer 5 is smaller than an outer diameter W of the wafer 5 and a collar part 4c extended from the side surface 4d of the support body 4b in an outer peripheral direction, and a prescribed gap G1 is formed between the collar part 4c and the backside of the outer periphery of the wafer 5.

COPYRIGHT: (C)2009,JPO&INPIT


(JA)

【課題】基板にバイアスを印加して成膜する場合においても、パーティクルを低減することができるプラズマ成膜装置を提供する。
【解決手段】チャンバ内の支持台４上に載置したウェハ５にバイアスを印加すると共に、ウェハ５上にプラズマを用いて薄膜を形成するプラズマ成膜装置において、支持台４は、ウェハ５との接触面４ａの外径Ｃがウェハ５の外径Ｗより小さい円柱状の支持台本体４ｂと、支持台本体４ｂの側面４ｄから外周方向に延設された鍔部４ｃとを備え、鍔４ｃとウェハ５の外周の裏面との間に所定の隙間Ｇ１を形成している。
【選択図】図２
関連特許文献
KR1020100063800
EP2202786
US20100236482
WO/2009/051087
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