WO/2016/127464 ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL||WO||18.08.2016|
||PCT/CN2015/073925||SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.||FU, Yanfeng|
An array substrate, comprising: a substrate (100), and a first metal layer (101), a first insulating layer (102), a second metal layer (103), a second insulating layer (104), and a pixel electrode layer (105) sequentially provided on the surface of the substrate (100). At a position of connection wire, multiple first through holes (106) and multiple second through holes (107) are provided, so as to expose a first metal wire and a second metal wire, electrically connected via conducive wire of the pixel electrode layer (105). The substrate effectively prevents the problem of drain module vertical or horizontal line faults.
WO/2016/130050 MITIGATING THE IMPACT FROM INTERNET ATTACKS IN A RAN USING INTERNET TRANSPORT||WO||18.08.2016|
||PCT/SE2015/050142||TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)||THYNI, Tomas|
The present disclosure relates to methods and devices for mitigating the impact from Internet attacks in a Radio Access Network, RAN, using Internet transport. This object is obtained by a method performed in network node in a Core network, CN, of mitigating the impact from Internet attacks in a Radio Access Network, RAN, using Internet transport. The method comprises receiving, from at least a network node in a Radio Access Network, RAN, an intrusion detection report, the intrusion detection report comprises information about an Internet attack in the RAN. The method further comprises selecting based on the information, a mitigation action, the mitigation action mitigating the impact of the attack on the RAN service level. Further the method comprises performing the selected mitigation action to mitigate the impact on the RAN service level.
WO/2016/127640 PIXEL ARRANGEMENT STRUCTURE AND DISPLAY APPARATUS||WO||18.08.2016|
||PCT/CN2015/089728||BOE TECHNOLOGY GROUP CO., LTD.||ZHU, Mingyi|
A pixel arrangement structure and a display apparatus.The pixel arrangement structure comprises repeatedly arranged pixel groups, wherein each of the pixel groups at least comprises a first pixel (21), a second pixel (22) and a third pixel (23), each of the pixels comprises sub-pixels of at least two colours, and colours and orders of sub-pixels included in different pixels are not exactly the same.The pixel arrangement structure can improve aperture ratios of sub-pixels of some colours.
WO/2016/129340 EMULSION TYPE COATING||WO||18.08.2016|
||PCT/JP2016/051499||HOEI SANGYO CO., LTD.||TAKAO Kazumi|
A heat-insulating coating is often applied to the surface of buildings. As the surface of the building becomes soiled, the reflectance of light declines, heat is more easily absorbed, and the heat-insulating effect declines. The present invention provides a coating that can greatly reduce decomposition of resins and is easy to apply, it being the objective to prevent soiling and provide heat insulation. A coating composed of organic hollow balloons A having photocatalyst microparticles fixed on the surface by thermal fusion, organic hollow balloons B having microparticles of other than a photocatalyst fixed on the surface by the same method, an organic resin, colloidal silica, and water, wherein the specific gravity of the organic hollow balloons B is greater than that of the organic hollow balloons A.
WO/2016/124236 HIGH BANDWIDTH AMPLIFIER||WO||11.08.2016|
||PCT/EP2015/052320||TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)||MASTANTUONO, Daniele|
An amplifier (100) comprising: first, second, third and fourth transistors (M1, M2, M3, M4), an input (10) for an input signal, and a first output (22) for a first amplified signal; a first terminal (T11) of the first transistor (M1) coupled to a first voltage rail (12), a second terminal (T12) of the first transistor (M1) coupled to a first terminal (T31) of the third transistor (M3), and a gate (G1) of the first transistor (M1) coupled to the input (10),; a first terminal (T21) of the second transistor (M2) coupled to a second voltage rail (14), a second terminal (T22) of the second transistor (M2) coupled to the first output (22), and a gate (G2) of the second transistor (M2) coupled to the input (10); a load (40) coupled between a second terminal (T32) of the third transistor (M3) and a third voltage rail (20), and a gate (G3) of the third transistor (M3) coupled to a bias node (16) for applying a bias voltage to the gate (G3) of the third transistor (M3); a first terminal (T41) of the fourth transistor (M4) coupled to the first output (22), a second terminal (T42) of the fourth transistor (M4) coupled to a fourth voltage rail (24), and a gate (G4) of the fourth transistor (M4) coupled to the second terminal (T32) of the third transistor (M3); and a first capacitive element (C1) coupled between the second terminal (T32) of the third transistor (M3) and the first output (22).
WO/2016/123991 SHIFT REGISTER AND DRIVE METHOD THEREFOR, GRID DRIVE CIRCUIT AND DISPLAY DEVICE||WO||11.08.2016|
||PCT/CN2015/090714||BOE TECHNOLOGY GROUP CO., LTD.||MA, Zhanjie|
A shift register and a drive method therefor, a grid drive circuit and a display device. The shift register comprises an input module (1), an output module (2) and an output control module (3); the output module (2) comprises a first output unit (21) and a second output unit (22), wherein a first node (P) controls the first output unit (21), the first output unit (21) controls signal transmission between a second clock signal input end (CK2) and a signal output end (OUT-PUT), a second node (Q) controls the second output unit (22), and the second output unit (22) controls signal transmission between a high/low level signal input end (VGH/VGL) and the signal output end (OUT-PUT); the output control module (3) comprises a first control unit (31) and a second control unit (32), wherein the first control unit (31) controls the level of the first node (P), and the second control unit (32) controls the level of the second node (Q). According to the solution of the present disclosure, impact of the change in a clock signal associated with the output module on an output signal can be reduced, thus improving the output effect of the shift register.
WO/2016/124219 DETERMINATION OF RADIATION BEAM PATTERN||WO||11.08.2016|
||PCT/EP2015/052100||TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)||RAMACHANDRA, Pradeepa|
There is provided a method for determining a radiation beam pattern. The method is performed by a network node. The method comprises transmitting probe signals, the probe signals being orthogonal to cell-specific reference signals (CRS) transmitted by the network node. The method comprises receiving responses to the probe signals from wireless devices, wherein each response comprises a measurement report based on reception of the transmitted probe signals at each wireless device. The method comprises determining a radiation beam pattern based on the received measurement reports.
WO/2016/123818 LIQUID CRYSTAL REACTIVE FILM MANUFACTURING METHOD AND REACTION APPARATUS||WO||11.08.2016|
||PCT/CN2015/072864||SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.||ZHAO, Rentang|
A liquid crystal reactive film manufacturing method and reaction apparatus, the method comprising: placing a liquid crystal container into a first reaction apparatus and applying a temperature, a voltage, and an ultraviolet (UV) radiation thereto so as to enable a liquid crystal reactive monomer (RM) in the liquid crystal container to undergo a polymerization reaction (S201); transferring the liquid crystal container to a second reaction apparatus if a time threshold for transfer has been reached (S203); determining whether the liquid crystal container has been successfully transferred (S204); if not, performing an alert (S205); if a danger time threshold has been reached, using an ejector configured with the first reaction apparatus to push up the liquid crystal container so as to enable the liquid crystal container to move away from a platform surface (S207).
WO/2016/124243 D2D TRAFFIC BALANCING||WO||11.08.2016|
||PCT/EP2015/052418||TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)||THANGARASA, Santhan|
There is provided a method for balancing device-to-device (D2D) traffic in a communications network. The method is performed by a network device in the communications network. The method comprises acquiring information indicating that a first set of D2D capable wireless devices is present in the communications network. The method comprises acquiring D2D traffic information of the first set of D2D capable wireless devices. The method comprises adapting D2D traffic within the communications network, between a first cell on a first carrier and a second cell on a second carrier in the communications network, based on the D2D traffic information, thereby balancing D2D traffic in the communications network. There is also provided a network device configured to perform such a method and a computer program causing a network device perform such a method.
WO/2016/123978 PIXEL ARRAY, DISPLAY DEVICE AND DISPLAY METHOD||WO||11.08.2016|
||PCT/CN2015/089422||BOE TECHNOLOGY GROUP CO., LTD.||ZHAO, Wenqing|
A pixel array, display device and display method, the pixel array comprising a plurality of pixel rows, wherein each of the pixel rows comprises repeated units sequentially arranged in a row direction, and each of the repeated units comprises three sub-pixels (B, R, G) having different colors. Odd pixel rows and even pixel rows are alternately arranged in a column direction; in an odd pixel row and an even pixel row adjacent to each other, a minimum separation along the row direction, between center points of sub-pixels having a same color, is equal to 1-1.5 times of a width of a sub-pixel, the width of the sub-pixel being a length of the sub-pixel along the row direction. The pixel array, display device and display method can realize high resolution by 2D pixel rendering. In a 3D mode, 3D optical crosstalk is improved by adding a sub-pixel for buffering.