Traitement en cours

Veuillez attendre...

Paramétrages

Paramétrages

Aller à Demande

1. WO2020108731 - GÉNÉRATEUR DE SIGNAL À MODULATION D'IMPULSIONS EN DURÉE

Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

[ EN ]

Claim s

1. A pulse-width modulation signal generator comprising:

an analogue delay-locked loop which comprises a delay line arranged to receive a clock signal, the delay line comprising a chain of delay cells outputting a plurality of phases, a phase selector for selecting a one of the plurality of phases as a selected phase signal in dependence upon a phase selection signal, and a delay controller configured to compare respective phases of the clock signal and the last delay cell and to generate a delay control signal for the delay cells in dependence thereon ; and

logic configured to receive the selected phase signal and a clock period-selecting signal selecting a one clock period for a pulse-width modulation signal period, and to output the pulse-width modulation signal period having a rising edge or falling edge whose timing corresponds to an edge of the selected phase signal occurring in the one clock period.

2. The pulse-width modulation signal generator of claim 1, wherein n is between 20 and 200 , preferably 50 or 100.

3. The pulse-width modulation signal generator of claim 1 or 2, wherein the logic is configured to receive a first set of bits and to generate the clock-period selection signal in dependence on the first set of bits.

4. The pulse-width modulation signal generator of any one of claims 1 to 3, wherein the logic is configured to receive a second set of bits and to generate the phase-period selection signal in dependence on the second set of bits

5. The pulse-width modulation signal generator of any one of claims 1 to 4, wherein the logic is further configured to receive the clock signal and to generate a rising edge of the pulse-width modulation signal period in dependence upon the clock signal.

6. A system comprising:

a controller; and

the pulse-width modulation signal generator of any one of claims 1 to 5.

7. A monolithic integrated circuit comprising:

the pulse-width modulation signal generator of any one of claims 1 to 5.

8. The monolithic integrated circuit of claim 7, which is a microcontroller or a system on a chip.

9. A motor vehicle comprising:

the pulse-width modulation signal generator of any one of claims 1 to 5, the system of claim 6, or the integrated circuit of claim 7 or 8.

10. A method, comprising:

generating a selected phase signal using an analogue delay-locked loop in dependence on a clock signal and a phase-selection signal; and

generating a pulse width a pulse-width modulation signal period having a rising edge or falling edge whose timing corresponds to an edge of the selected phase signal occurring in the one clock period.