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1. WO2020005559 - CONDENSATEURS À FILM MINCE INCORPORÉS DANS UN BOÎTIER, INDUCTEURS MAGNÉTIQUES INTÉGRÉS DANS UN BOÎTIER, ET LEURS PROCÉDÉS D'ASSEMBLAGE

Numéro de publication WO/2020/005559
Date de publication 02.01.2020
N° de la demande internationale PCT/US2019/037021
Date du dépôt international 13.06.2019
CIB
H01G 4/33 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
GCONDENSATEURS; CONDENSATEURS, REDRESSEURS, DÉTECTEURS, DISPOSITIFS DE COMMUTATION, DISPOSITIFS PHOTOSENSIBLES OU SENSIBLES À LA TEMPÉRATURE, DU TYPE ÉLECTROLYTIQUE
4Condensateurs fixes; Procédés pour leur fabrication
33Condensateurs à film mince ou à film épais
H01G 4/30 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
GCONDENSATEURS; CONDENSATEURS, REDRESSEURS, DÉTECTEURS, DISPOSITIFS DE COMMUTATION, DISPOSITIFS PHOTOSENSIBLES OU SENSIBLES À LA TEMPÉRATURE, DU TYPE ÉLECTROLYTIQUE
4Condensateurs fixes; Procédés pour leur fabrication
30Condensateurs à empilement
CPC
H01L 2224/0401
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
0401Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
H01L 2224/16227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
16227the bump connector connecting to a bond pad of the item
H01L 23/49816
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
49816Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
H01L 23/49822
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49822Multilayer substrates
H01L 23/5223
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
5222Capacitive arrangements or effects of, or between wiring layers
5223Capacitor integral with wiring layers
H01L 23/5227
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
5227Inductive arrangements or effects of, or between, wiring layers
Déposants
  • INTEL CORPORATION [US]/[US]
Inventeurs
  • XU, Cheng
  • JAIN, Rahul
  • KIM, Seo Young
  • LEE, Kyu Oh
  • PARK, Ji Yong
  • VADLAMANI, Sai
  • ZHAO, Junnan
Mandataires
  • PERDOK, Monique M.
  • ARORA, Suneel / U.S. Reg. No. 42,267
  • BEEKMAN, Marvin / U.S. Reg. No. 38,377
  • BLACK, David W. / U.S. Reg. No. 42,331
  • LANG, Roger
  • SCHEER, Bradley W. / U.S. Reg. No. 47,059
Données relatives à la priorité
16/017,24725.06.2018US
Langue de publication anglais (EN)
Langue de dépôt anglais (EN)
États désignés
Titre
(EN) PACKAGE-EMBEDDED THIN-FILM CAPACITORS, PACKAGE-INTEGRAL MAGNETIC INDUCTORS, AND METHODS OF ASSEMBLING SAME
(FR) CONDENSATEURS À FILM MINCE INCORPORÉS DANS UN BOÎTIER, INDUCTEURS MAGNÉTIQUES INTÉGRÉS DANS UN BOÎTIER, ET LEURS PROCÉDÉS D'ASSEMBLAGE
Abrégé
(EN)
Disclosed embodiments include an embedded thin-film capacitor and a magnetic inductor that are assembled in two adjacent build-up layers of a semiconductor package substrate. The thin-film capacitor is seated on a surface of a first of the build-up layers and the magnetic inductor is partially disposed in a recess in the adjacent build up layer. The embedded thin-film capacitor and the integral magnetic inductor are configured within a die shadow that is on a die side of the semiconductor package substrate.
(FR)
L'invention concerne, selon des de modes de réalisation, un condensateur à film mince incorporé et un inducteur magnétique qui sont assemblés dans deux couches d'accumulation adjacentes d'un substrat de boîtier de semi-conducteur. Le condensateur à film mince est placé sur la surface d'une première des couches d'accumulation et l'inducteur magnétique est partiellement disposé dans un creux dans la couche d'accumulation adjacente. Le condensateur à film mince incorporé et l'inducteur magnétique intégré sont configurés à l'intérieur d'une ombre de puce qui est sur un côté de puce du substrat de boîtier de semi-conducteur.
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