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1. (WO2019007997) ADAPTATEUR POUR UN DISPOSITIF DE CONNEXION DE CONTACT DE BUS
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CLAIMS

1 . A coupling arrangement (121 ) configured to switch one or more bus wires (412, 414) between a device and a mating surface (1 12, 1 14) between a closed state and an open state, the device being electrically powered at a characteristic voltage, the coupling arrangement comprising:

- at least as many electrical contact areas (122, 123) between the device and the mating surface as a count of the one or more bus wires;

- one or more electronic circuits, having together at least a first input/output (I/O, 41 1 ), a second I/O (412), a third I/O (413) and a fourth I/O (414), the first I/O and the third I/O being connected to the electrical contact areas, the second I/O and the fourth I/O being configured to be put in electrical connection with at least one of the one or more of the bus wires of the device;

wherein the electronic circuit is adapted to perform one or more of a first anti- inversion of current function (431 1 b, 4312b) between the first I/O and the second I/O or a second anti-inversion of current function (431 1 b, 4313b) between the fourth I/O and the third I/O, wherein the electronic circuit comprises a resistance (420) of a predetermined value between the second I/O and the fourth I/O, wherein said predetermined value is set as a function of the value of said characteristic operating voltage, whereby said resistance is detected when said device is correctly positioned on said mating surface.

2. The coupling arrangement of claim 1 , wherein the bus connection is in a closed state when a voltage of the first I/O equals a first voltage value within a predefined tolerance margin and a voltage of the third I/O equals a second voltage value within the predefined tolerance margin.

3. The coupling arrangement of one of claims 1 to 2, wherein the bus connection is in an open state when a voltage of the first I/O equals a second voltage value within a predefined voltage tolerance margin and a voltage of the third I/O equals a first voltage value within the predefined voltage tolerance margin.

4. The coupling arrangement of one of claims 1 to 3, wherein the one or more electronic circuits comprise a MOSFET-P transistor (430b) the drain (431 b) of which is connected to the first I/O (41 1 ), the source (432b) of which is connected to the second I/O (412) and the gate (433b) of which is connected to the third I/O (413) and the fourth I/O (414).

5. The coupling arrangement of one of claims 1 to 3, wherein the one or more electronic circuits comprise a MOSFET-N transistor (430c) the gate (433c) of which is connected to the first I/O (41 1 ) and the second I/O (412), the drain (431 c) of which is connected to the third I/O (413) and the source of which is connected to the fourth I/O (414).

6. The coupling arrangement of claims 4 and 5, wherein the one or more electronic circuits comprise a MOSFET-P transistor (431 d) and a MOSFET-N transistor (432d).

7. The coupling arrangement of one of claims 4 to 6, wherein a MOSFET transistor has an internal resistance between its source and gate of a predetermined value.

8. The coupling arrangement of one of claims 1 to 7, wherein one of the one or more bus connections is configured to transmit power from the mating surface to the device.

9. The coupling arrangement of one of claims 1 to 8, wherein a distance between any of the electrical contact areas and a neighboring electrical contact area is larger than a characteristic dimension of the mating surface.

10. The coupling arrangement of one of claims 1 to 9, wherein the electrical contact areas are located on a surface of the device and the one or more electronic circuits are located in an interior of the device.

1 1 . The coupling arrangement of claim 10, wherein the surface of the device and the electrical contact areas are configured in such a way that, when the device is positioned on the mating surface, it is capable to hold a position of stable balance and the one or more bus connections between the device and the mating surface may be closed.

12. The coupling arrangement of one of claims 1 to 1 1 , wherein the electrical contact areas and the one or more electronic circuits are located on an accessory that is configured to be engaged with the device and further comprises one or more male connectors to one or more ports of the one or more bus connections of the device.

13. The coupling arrangement of claim 12, wherein the accessory and the electrical contact areas are configured in such a way that, when the accessory is engaged with the device and the device is positioned on the mating surface, the device is capable to hold a position of stable balance and the one or more bus connections between the device and the mating surface may be closed.

14. The coupling arrangement of one of claims 12 to 13, wherein at least a male connector further comprises a female connector that mirrors the port in which the male connector is to be engaged, the female connector being perpendicular to the male connector.

15. The coupling arrangement of one of claims 13 to 14, wherein a wire link between the accessory and a male connector is retractable in the accessory.

1 6. A method of coupling a device and a mating surface in a manner that allows switching one or more bus wires between a closed state and an open state, the device being electrically powered at a characteristic voltage, the method comprising:

- providing at least as many electrical contact areas between the device and the mating surface as a count of the one or more bus wires;

- providing one or more electronic circuits having together a first input/output (I/O), a second I/O, a third I/O and a fourth I/O, the first I/O and the third I/O being connected to the electrical contact areas, the second I/O and the fourth I/O being configured to be put in electrical connection with at least one of the one or more of the bus wires of the device;

- providing a resistance (420) of a predetermined value between the second I/O and the fourth I/O, wherein said predetermined value is set as a function of the value of said characteristic operating voltage;

wherein the electronic circuit is adapted to perform one or more of a first anti- inversion of current function between the first I/O and the second I/O or a second anti-inversion of current function between the fourth I/O and the third I/O, and to detect the resistance value when said device is correctly positioned on said mating surface.