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1. (WO2019005157) DISPOSITIFS DE MÉMOIRE DE COUPLE DE TRANSFERT DE SPIN PERPENDICULAIRE (PSTTM) À STABILITÉ AMÉLIORÉE ET À TAUX DE MAGNÉTORÉSISTANCE ÉLEVÉE À EFFET TUNNEL, ET LEURS PROCÉDÉS DE FORMATION
Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

CLAIMS

What is claimed is:

1. A magnetic structure comprising:

a magnetic layer above a substrate;

an oxide layer on the magnetic layer;

a second magnetic layer on the oxide layer;

a metallic cap layer on the second magnetic layer; and

one or more conductive nano-channels extending from the metallic cap layer through the second magnetic layer into the oxide layer, wherein each of the one or more conductive nano-channels comprise the material of the metallic cap layer.

2. The magnetic structure of claim 1, wherein the metallic cap layer comprises a metal selected from the group consisting of HE, W and Ta.

3. The magnetic structure of claim 2, wherein the metallic cap layer further includes a trace element selected from the group consisting of Kr and Xe.

4. The magnetic structure of claim 3, wherein the trace element in the metallic cap layer has a concentration between 2 x 1020 atoms/cm3 to 4 x 1020 atoms/cm3.

5. The magnetic structure of claim 1, wherein the metallic cap has a thickness between 0.5nm and lnm.

6. The magnetic structure of claim 1, wherein each of the one or more conductive nano-channels have a maximum width between lnm and lOnm.

7. The magnetic structure of claim 1, wherein at least one of the one or more conductive nano-channels extends to an uppermost surface of the magnetic layer.

8. The magnetic structure of claim 1, wherein the one or more conductive nano-channels comprises boron.

9. The magnetic structure of claim 1 further includes an etch stop layer on the second magnetic layer and wherein the etch stop layer has a thickness that is between 5-10 times the thickness of the metallic cap.

10. The magnetic structure of claim 1, wherein the second magnetic layer has a thickness between 0. lnm and 0.3nm.

11. A memory device, comprising:

a bottom electrode;

a fixed magnet above the bottom electrode;

a tunnel barrier layer on the fixed magnet;

a free magnet on the tunnel barrier;

an oxide layer on the free magnet;

a follower magnet on the oxide layer;

a metallic cap on the follower magnet, wherein the metallic cap comprises a metal selected from the group consisting of Hf, W and Ta;

one or more conductive nano-channels extending from the metallic cap through the free magnet and into the oxide layer, wherein each of the one or more conductive nano-channels comprise the material of the metallic cap; and

a top electrode on the etch stop layer.

12. The memory device of claim 11, wherein the metallic cap layer further includes a trace element selected from the group consisting of Kr and Xe.

13. The memory device of claim 11, wherein the trace element in the metallic cap layer has a concentration between 2 x 1020 atoms/cm3 to 4 x 1020 atoms/cm3.

14. The memory device of claim 11, wherein each of the one or more conductive nano-channels has a maximum width between lnm and lOnm.

15. The memory device of claim 11, wherein each of the one or more conductive nano-channels comprises boron.

16. The memory device of claim 11, wherein each of the one or more conductive nano-channels further extends to an uppermost surface of the free magnet.

17. The memory device of claim 11, wherein the follower magnet is between 0. Inm and 0.3nm.

18. The memory device of claim 11, wherein the oxide layer has a thickness between 0.5nm and 0.8nm.

19. A method of fabricating a memory device, the method comprising:

forming a material layer stack for the memory device, the forming comprising:

forming a bottom electrode layer above a substrate;

forming a magnetic layer above the bottom electrode layer;

forming an oxide layer on the magnetic layer;

forming a second magnetic layer on the oxide layer;

forming a second oxide layer on the magnetic layer;

forming a follower magnetic layer on the second oxide layer;

forming a metallic cap layer on the follower magnetic layer by a deposition process, wherein the deposition process creates one or more conductive nano-channels in the follower magnetic layer and in the underlying second oxide layer and fills the one or more conductive nano-channels with the material of the metallic cap layer;

forming a top electrode on the metallic cap layer; and

patterning the material layer stack to form a memory device.

20. The method of claim 19, wherein the deposition process of forming the metallic cap layer further includes sputter depositing the metallic cap layer with an inert gas to optimize the creation of the nano-channel, and wherein the process of sputter depositing with an inert gas implants trace amounts of the inert gas into the metallic cap layer.

21. The method of claim 19, wherein the material layer stack is annealed at temperatures between 300-400 degrees Celsius, and wherein the anneal enables boron to diffuse from the second magnetic layer into the nano-channel.

22. The method of claim 21, wherein the diffusion of boron enables an as deposited amorphous second magnetic layer to form a (001) crystal structure by templating off of a (001) crystal structure of the oxide layer.

23. The method of claim 19, wherein forming the material layer stack for the memory device further includes forming an etch stop layer on the metallic cap.

24. The method of claim 19 further includes depositing a dielectric spacer layer on the memory device and then etching the dielectric spacer layer to form a dielectric spacer adjacent to sidewalls of the memory device.