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1. (WO2017139410) DISPOSITIF INTÉGRÉ COMPRENANT UN CONDENSATEUR COMPORTANT DE MULTIPLES BROCHES ET AU MOINS UNE BROCHE TRAVERSANT UNE PLAQUE DU CONDENSATEUR
Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

CLAIMS

1. An integrated device comprising:

a die;

a first redistribution portion coupled to the die, wherein the first redistribution portion comprises:

at least one dielectric layer;

a capacitor comprising:

a first plate;

a second plate;

an insulation layer located between the first plate and the second plate;

a plurality of first pins coupled to the first plate of the capacitor; and a plurality of second pins coupled to the second plate of the capacitor.

2. The integrated device of claim 1, wherein at least one pin from the plurality of first pin traverses through the second plate to couple to the first plate of the capacitor.

3. The integrated device of claim 1, wherein at least one pin from the plurality of first pins comprises at least one interconnect.

4. The integrated device of claim 3, wherein the at least one interconnect comprises a via, a trace, and/or a pad.

5. The integrated device of claim 1, wherein the second plate comprises a fin design.

6. The integrated device of claim 5, wherein the insulation layer substantially forms over a contour of the fin design of the second plate.

7. The integrated device of claim 1, wherein the first redistribution portion further comprises at least one input / output (I O) pin that traverses through the first plate and the second plate of the capacitor.

8. The integrated device of claim 1, wherein the insulation layer comprises a k value of at least 7.

9. The integrated device of claim 1, further comprising a second redistribution portion, wherein the first redistribution portion comprises a plurality of first interconnects having a first spacing, and wherein the second redistribution portion comprises a plurality of second interconnects having a second spacing that is different than the first spacing.

10. The integrated device of claim 1, wherein the integrated device is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, and a device in a automotive vehicle.

11. An apparatus comprising:

a die;

a first redistribution portion coupled to the die, wherein the first redistribution portion comprises:

at least one dielectric layer;

a means for capacitance located in the at least one dielectric layer;

a plurality of first pins coupled to a first portion of the means for capacitance; and

a plurality of second pins coupled to a second portion of the means for capacitance.

12. The apparatus of claim 11, wherein at least one pin from the plurality of first pin at least partially traverses through the means for capacitance.

13. The apparatus of claim 11, wherein at least one pin from the plurality of first pins comprises at least one interconnect.

14. The apparatus of claim 13, wherein the at least one interconnect comprises a via, a trace, and/or a pad.

15. The apparatus of claim 11, wherein the means for capacitance comprises a fin design.

16. The apparatus of claim 15, wherein the means for capacitance comprises an insulation layer that substantially forms over a contour of the fin design.

17. The apparatus of claim 11, wherein the first redistribution portion further comprises at least one input / output (I O) pin that traverses through the means for capacitance.

18. The apparatus of claim 11, wherein the means for capacitance includes an insulation layer comprises a k value of at least 7.

19. The apparatus of claim 11, further comprising a second redistribution portion, wherein the first redistribution portion comprises a plurality of first interconnects having a first spacing, and wherein the second redistribution portion comprises a plurality of second interconnects having a second spacing that is different than the first spacing.

20. The apparatus of claim 11, wherein the apparatus is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, and a device in a automotive vehicle.

21. A method for fabricating an integrated device, comprising:

providing a die;

coupling a first redistribution portion to the die, wherein coupling the first redistribution portion comprises:

forming at least one dielectric layer;

forming a capacitor in the at least one dielectric layer, wherein forming the capacitor comprises:

forming a first plate;

forming a second plate;

forming an insulation layer between the first plate and the second plate;

forming a plurality of first pins over the first plate of the capacitor; and forming a plurality of second pins over the second plate of the capacitor.

22. The method of claim 21, wherein at least one pin from the plurality of first pin traverses through the second plate to couple to the first plate of the capacitor.

23. The method of claim 21, wherein at least one pin from the plurality of first pins comprises at least one interconnect.

24. The method of claim 23, wherein the at least one interconnect comprises a via, a trace, and/or a pad.

25. The method of claim 21, wherein forming the second plate comprises forming a second plate that includes a fin design.

26. The method of claim 25, wherein forming the insulation layer comprises substantially forming the insulation layer over a contour of the fin design of the second plate.

27. The method of claim 21, wherein forming the first redistribution portion further comprises forming at least one input / output (I O) pin that traverses through the first plate and the second plate of the capacitor.

28. The method of claim 21, wherein the insulation layer comprises a k value of at least 20.

29. The method of claim 21, further comprising forming a second redistribution portion, wherein the first redistribution portion comprises a plurality of first

interconnects having a first spacing, and wherein the second redistribution portion comprises a plurality of second interconnects having a second spacing that is different than the first spacing.

30. The method of claim 21, wherein the integrated device is incorporated into a device selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, and a device in a automotive vehicle.