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1. WO2012000301 - DISPOSITIF SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FORMATION

Numéro de publication WO/2012/000301
Date de publication 05.01.2012
N° de la demande internationale PCT/CN2011/000337
Date du dépôt international 02.03.2011
CIB
H01L 21/336 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
21Procédés ou appareils spécialement adaptés à la fabrication ou au traitement de dispositifs à semi-conducteurs ou de dispositifs à l'état solide, ou bien de leurs parties constitutives
02Fabrication ou traitement des dispositifs à semi-conducteurs ou de leurs parties constitutives
04les dispositifs présentant au moins une barrière de potentiel ou une barrière de surface, p.ex. une jonction PN, une région d'appauvrissement, ou une région de concentration de porteurs de charges
18les dispositifs ayant des corps semi-conducteurs comprenant des éléments du groupe IV de la classification périodique, ou des composés AIIIBV, avec ou sans impuretés, p.ex. des matériaux de dopage
334Procédés comportant plusieurs étapes pour la fabrication de dispositifs du type unipolaire
335Transistors à effet de champ
336à grille isolée
H01L 29/78 2006.01
HÉLECTRICITÉ
01ÉLÉMENTS ÉLECTRIQUES FONDAMENTAUX
LDISPOSITIFS À SEMI-CONDUCTEURS; DISPOSITIFS ÉLECTRIQUES À L'ÉTAT SOLIDE NON PRÉVUS AILLEURS
29Dispositifs à semi-conducteurs spécialement adaptés au redressement, à l'amplification, à la génération d'oscillations ou à la commutation et ayant au moins une barrière de potentiel ou une barrière de surface; Condensateurs ou résistances ayant au moins une barrière de potentiel ou une barrière de surface, p.ex. jonction PN, région d'appauvrissement, ou région de concentration de porteurs de charges; Détails des corps semi-conducteurs ou de leurs électrodes
66Types de dispositifs semi-conducteurs
68commandables par le seul courant électrique fourni ou par la seule tension appliquée, à une électrode qui ne transporte pas le courant à redresser, amplifier ou commuter
76Dispositifs unipolaires
772Transistors à effet de champ
78l'effet de champ étant produit par une porte isolée
CPC
H01L 21/823807
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823807with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
H01L 21/823842
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823828with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
823842gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
H01L 21/823857
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
8234MIS technology ; , i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
8238Complementary field-effect transistors, e.g. CMOS
823857with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
H01L 29/4983
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
43characterised by the materials of which they are formed
49Metal-insulator-semiconductor electrodes, ; e.g. gates of MOSFET
4983with a lateral structure, e.g. a Polysilicon gate with a lateral doping variation or with a lateral composition variation or characterised by the sidewalls being composed of conductive, resistive or dielectric material
H01L 29/6653
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
6653using the removal of at least part of spacer, e.g. disposable spacer
H01L 29/7833
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
7833with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Déposants
  • 中国科学院微电子研究所 INSTITUTE OF MICROELECTRONICS, CHINESE ACADEMY OF SCIENCES [CN/CN]; 中国北京市朝阳区北土城西路3号 No. 3 Beitucheng West Road Chaoyang District Beijing 100029, CN (AllExceptUS)
  • 朱慧珑 ZHU, Huilong [US/US]; US (UsOnly)
  • 梁擎擎 LIANG, Qingqing [CN/CN]; CN (UsOnly)
Inventeurs
  • 朱慧珑 ZHU, Huilong; US
  • 梁擎擎 LIANG, Qingqing; CN
Mandataires
  • 中国专利代理(香港)有限公司 CHINA PATENT AGENT (H.K.) LTD.; 中国香港特别行政区湾仔港湾道23号鹰君中心22号楼 22/F, Great Eagle Centre 23 Harbour Road, Wanchai Hong Kong, CN
Données relatives à la priorité
201010223866.001.07.2010CN
Langue de publication chinois (ZH)
Langue de dépôt chinois (ZH)
États désignés
Titre
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME
(FR) DISPOSITIF SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FORMATION
(ZH) 一种半导体器件及其形成方法
Abrégé
(EN)
A method for forming a semiconductor device is provided. The semiconductor device includes a PMOS device and the steps of forming the PMOS device comprise: forming a gate stack structure which includes a gate dielectric layer (120), a gate and sidewalls (144), wherein the gate dielectric layer (120) is formed on a semiconductor substrate (100), the gate is formed on the gate dielectric layer (120), and the sidewalls (144) are around the gate and the gate dielectric layer (120) or around the gate and covering the gate dielectric layer (120); removing the sidewalls(144) to form a cavity(182); filling the cavity(182) with an auxiliary layer(184) which has a first compressive stress. A semiconductor device formed with the method is also provided. It helps to improve the performance of the device.
(FR)
L'invention concerne un procédé de formation d'un dispositif semi-conducteur qui comprend un dispositif PMOS. Ledit procédé consiste à former une structure de grille empilée qui comprend une couche de diélectrique de grille (120), une grille et des parois latérales (144). La couche de diélectrique de grille (120) est formée sur un substrat semi-conducteur (100), la grille est formée sur la couche de diélectrique de grille (120), et les parois latérales (144) soit entourent la grille et la couche de diélectrique de grille (120), soit entourent la grille et recouvrent la couche de diélectrique de grille (120). Le procédé consiste également à retirer les parois latérales (144) pour former une cavité (182), et remplir la cavité (182) avec une couche auxiliaire (184) qui présente une première contrainte de compression. L'invention concerne également un dispositif semi-conducteur formé par le procédé. Ce dernier permet d'améliorer les performances du dispositif.
Également publié en tant que
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