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1. (WO2005066679) BUS DE MEMOIRE OPTIQUE A FAIBLE TEMPS D'ATTENTE
Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

CLAIMS
What is claimed is:
1. An apparatus, comprising:
an integrated circuit to communicate with a memory, the integrated circuit having an optical transmitter;
an optical bus coupled to the optical transmitter;
N optical receivers coupled to the optical bus via N optical couplers;
N memory modules coupled to the N optical receivers; and
one or more memory devices coupled to the N memory modules,
the optical transmitter to convert a signal to
communicate with the memory devices from a first electrical signal to an optical signal, the optical bus to propagate the optical signal, each of the N optical couplers to couple one-Nth of the optical signal from the optical bus to its associated optical receiver, each optical receiver to convert its one-Nth of the optical signal to second set of electrical signals, the N memory modules to couple the second set of electrical signals to the memory devices.

2. The apparatus of claim 1, wherein the integrated circuit is a memory controller.

3. The apparatus of claim 1, wherein the integrated circuit is a processor.

4. The apparatus of claim 1, wherein the optical bus includes at least one of a waveguide, optical fiber, or free space.

5. The apparatus of claim 1, wherein the optical transmitter includes a laser.

6. The apparatus of claim 1, wherein the couplers are directional couplers.

7. The apparatus of claim 6, wherein the directional couplers include a waveguide or an optical fiber.

8. The apparatus of claim 1, wherein the couplers are free space couplers.

9. The apparatus of claim 8, wherein the free space couplers are beam splitters.

10. An article of manufacture, comprising a machine-accessible medium including data that, when accessed by a machine, cause the machine to perform the operations comprising:
converting a signal to communicate with memory devices from a first electrical signal to an optical signal;
propagating the optical signal on an optical bus to N optical couplers;
coupling one-Nth of the optical signal from the optical bus to each one of N optical receivers;
each optical receiver converting its one-Nth of the optical signal to a second set of electrical signals; and
coupling the second set of electrical signals to one or more memory devices via N memory modules.

11. The apparatus of claim 10, wherein the machine-accessible medium further includes data that cause the machine to perform operations comprising propagating the optical signal on a waveguide or optical fiber.

12. The apparatus of claim 11, wherein the machine-accessible medium further includes data that cause the machine to perform operations comprising coupling one-Nth of the optical signal from the optical bus to each one of N optical receivers via a directional coupler.
13. The apparatus of claim 10, wherein the machine-accessible medium further includes data that cause the machine to perform operations comprising propagating the optical signal via free space.

14. The apparatus of claim 13, wherein the machine-accessible medium further includes data that cause the machine to perform operations comprising coupling one-Nth of the optical signal from the optical bus to each one of N optical receivers via a beam splitter.

15. An apparatus, comprising:
one or more memory devices to communicate with an integrated circuit, the integrated circuit having an optical receiver;
N memory modules coupled to the memory devices;
N optical transmitters coupled to the N memory modules; and an optical bus coupled to the optical receiver,
each of the N optical transmitters to convert a signal to communicate with the integrated circuit from an electrical signal to an optical signal, the optical bus to propagate the optical signals to the optical receiver, the optical receiver to convert the optical signals to electrical signals.

16. The apparatus of claim 15, wherein the integrated circuit is a memory controller.

17. The apparatus of claim 15, wherein the integrated circuit is a processor.

18. The apparatus of claim 15, wherein the optical bus includes at least one of a waveguide, optical fiber, or free space.

19. The apparatus of claim 15, wherein the optical receiver includes a photodetector.

20. The apparatus of claim 15, wherein the couplers are directional couplers.

21. The apparatus of claim 20, wherein the directional couplers include a waveguide or an optical fiber.

22. A system, comprising:
an integrated circuit to communicate with a memory, the integrated circuit having an optical transmitter, an optical bus coupled to the optical transmitter, N optical receivers coupled to the optical bus via N optical couplers, N memory modules coupled to the N optical receivers, and one or more memory devices coupled to the N memory modules, the optical transmitter to convert a signal to communicate -with the memory devices from a first electrical signal to an optical signal, the optical bus to propagate the optical signal, each of the N optical couplers to couple one-Nth of the optical signal from the optical bus to its associated optical receiver, each optical receiver to convert its one-Nth of the optical signal to second set of electrical signals, the N memory modules to couple the second set of electrical signals to the memory devices; and
a graphics controller coupled to the integrated circuit.

23. The system of claim 22, wherein the integrated circuit is a memory controller.

24. The system of claim 22, wherein the integrated circuit is a processor.

25. A system, comprising:
one or more memory devices to communicate with an integrated circuit, the integrated circuit having an optical receiver, N memory modules coupled to the memory devices, N optical transmitters coupled to the N memory modules, and an optical bus coupled to the optical receiver, each of the N optical
transmitters to convert a signal to communicate with the
integrated circuit from an electrical signal to an optical signal, the optical bus to propagate the optical signals to the optical receiver, the optical receiver to convert the optical signals to electrical signals; and
a graphics controller coupled to the integrated circuit.

26. The system of claim 25, wherein the integrated circuit is a memory controller.

27. The system of claim 25, wherein the integrated circuit is a processor.