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Paramétrages

Paramétrages

1. WO2005065274 - FEUILLE DIELECTRIQUE ET SON PROCEDE DE FABRICATION, CIRCUIT IMPRIME ET ANTENNE A PLAQUE UTILISANT CETTE FEUILLE, ET PROCEDE DE FABRICATION DE CE CIRCUIT IMPRIME

Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

CLAIMS

1. A dielectric sheet, comprising:
a photodielectric support layer; and
a dielectric laminate, comprising
first and second metal foil layers, and
a dielectric layer disposed between the first and second metal foil layers, wherein the first metal foil layer is adhered to the photodielectric support layer.

2. The dielectric sheet according to claim 1 , wherein the dielectric layer comprises a crystallized dielectric oxide layer less than 1 micron thick.

3. The dielectric sheet according to claim 1 , wherein:
the first and second metal foil layers are each between 5 and 25 microns thick; and
the photodielectric support layer is less than 260 microns thick.

4. A printed circuit structure, comprising:
a dielectric sheet, comprising
a photodielectric support layer that is glass reinforced, and
a capacitive laminate, comprising
first and second metal foil layers, and
a dielectric layer disposed between the first and second metal foil layers, wherein the first metal foil layer is adhered to the photodielectric support layer; and
a printed circuit sub-structure.

5. The printed circuit structure according to claim 4, wherein the first metal foil layer is patterned by removal of metal according to a circuit pattern and the photodielectric support layer is patterned by removal of dielectric material according to the circuit pattern.

6. The capacitive sheet according to claim 4, wherein the dielectric layer comprises a crystallized dielectric oxide layer less than 1 micron thick.

7. An electronic device, comprising:
a printed circuit structure, comprising
a dielectric sheet, comprising
a photodielectric support layer that is glass reinforced, and
a capacitive laminate, comprising
first and second metal foil layers, and
a dielectric layer disposed between the first and second metal foil layers, wherein the first metal foil layer is adhered to the photodielectric support layer, and
at least one electronic component electrically connected to a portion of at least one of the first and second metal foil layers; and
a power source that is coupled to at least one of the at least one electronic component.

8. A method for fabricating a printed circuit structure, comprising:
patterning a glass reinforced polymer side of a capacitive sheet by removal of polymer and metal according to a circuit pattern; and
adhering the glass reinforced polymer side of the capacitive sheet to a printed circuit substructure.

9. The method for fabricating a printed circuit structure according to claim 8, wherein the capacitive sheet comprises a photodielectric support layer that is glass reinforced and a capacitive laminate that comprises first and second metal foil layers and a dielectric layer disposed between the first and second metal foil layers, and wherein the first metal foil layer is adhered to the photodielectric support layer, and wherein the patterning comprises:
exposing the photodielectric support layer using light and a photolithograph of the circuit pattern:
removing polymer material from the photodielectric support layer in areas defined by the circuit pattern; and
removing metal material from the first metal foil layer according to the circuit pattern.

10. A method for fabricating a dielectric sheet, comprising:
adhering a dielectric laminate and a glass reinforced photodielectric support layer to each other.

11. A patch antenna, comprising:
a photodielectric support layer;
a dielectric laminate, comprising
a dielectric layer
an antenna active region disposed on a first side of the dielectric layer, and
a first ground plane disposed on a second side of the dielectric layer, wherein the photodielectric support layer is adhered to the first ground plane, and wherein a second ground plane is disposed on the photodielectric layer opposite the first ground plane; and
a plated through hole, electrically isolated from the first and second ground planes, that couples the antenna active region to a side of the patch antenna having the second ground plane.