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1. (WO1988003339) GENERATION D'UN SIGNAL DE RESOLUTION A N+1 BITS A PARTIR D'UN CONVERTISSEUR A/N A N BITS
Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

IN THE CLAIMS
1. A system for generating an N+1 bit resolution from an N bit A/D converter, said system comprising:
control means (6) for generating a first control signal (10) and a conversion signal;
an A/D converter (4) having at least two voltage level reference inputs (VREF' VAG) for setting the range of the input analog signal to the converter, said A/D converter adapted to receive said conversion signal for converting the input analog signal to a digital word;
network means (14) for providing voltage value to said at least two voltage level reference inputs and operable for shifting each voltage value by an identical offset voltage value; and
logic control means (12) responsive to said control signal to cause said network means to shifting each voltage value by an identical offset voltage value.

2. A system for generating an N+1 bit resolution from an N bit A/D converter according to Claim 1 wherein said control means is a microprocessor.

3. A system for generating an N+1 bit resolution from an N bit A/D converter according to Claim 1 wherein said network means is a sysmetrical resistance network.

4. A system for generating an N+1 bit resolution from an N bit A/D converter according to Claim 1 wherein said offset voltage is defined as:

V"dither" =(V+)/2(N+1)

where N = the numbers of bits of normal resolution of the A/D converter.

5. A system for generating an N+1 bit resolution from an N bit A/D converter according to Claim 2 wherein said microprocessor in response to the generation of said control signal receives two consecutive digital words from said A/D converter and adds said digital words together to get a sum digital word having an extra bit in the least significant bit position.

6. A method of N+1 bit resolution from an N bit A/D converter comprising the steps of:
generating a conversion signal from a microprocessor to initiate the conversion of a digital word by the A/D converter;
generating a first N bit digital word from an analog signal in the A/D converter;
generating a control signal from a microprocessor indicating that an N+1 bit digital word resolution is to be generated;
responding to said control signal to generate an electrical signal according to the following formula

V "dither" =(V+)/2(N+1)

where N = the number of bits of normal resolution of the A/D converter;

applying said electrical signal to the A/D converter to shift the input range of the analog signal;
generating a second N bit digital word from the analog signal in the A/D converter; and then
summing the first and second N bit digital words in the microprocessor to get an N+1 bit digital word.

7. A system for generating an N+1 bit resolution from an N bit A/D converter, said system comprising:
control means for generating a control signal;
a logic circuit means including a resistance circuit means having a plurality of resistances of either of two values, said resistance circuit responsive to said control signal for generating at least two voltages and two offset equal voltages added to said at least two voltages;
an A/D converter adapted to receive said at least two voltages for identifying the range of the analog signal to be converted into a first digital word of N bits and in response to said control signal to receive said two offset equal voltages added to said at least two voltages for identifying the second range of the analog signal to be converted into a second digital word of N bits; and
a microprocessor means responsive to said A/D converter signals for summing said first and second digital words into an N+1 digital word.