1. JP2010096770 - SEMICONDUCTOR TEST APPARATUS

PROBLEM TO BE SOLVED: To perform an excellent failure/no-failure test of devices by measuring the cross point of a differential clock signal output from a device under test (DUT) and the timings of two data signals to obtain a relative phase difference between the two signals.

SOLUTION: There are provided a differential signal timing measuring means that outputs cross point information Tcross obtained by measuring the timing of the cross point of one differential output signal output from the DUT; a non-differential signal timing measuring means that outputs data change point information Tdata obtained by measuring a transition timing at which the logic of the other non-differential output signal output from DUT transitions; a phase difference calculating means that outputs a phase difference T obtained by calculating the relative phase difference between the cross point information Tcross obtained by measuring the two output signals at the same time and the data change point information Tdata; and a failure/no-failure test means receptive of the phase difference T for performing, based on a predetermined threshold value, a failure/no-failure test in the relative phase relationship of DUT.

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